US5968333A
Expired / Lapsed
US
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Method of electroplating a copper or copper alloy interconnect
Assignee: GlobalFoundries Inc
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Filing: 1998-04-07
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Granted: 1999-10-19
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Expires: 2018-04-07
Abstract
Abstract Copper or a copper alloy is electroplated to fill via/contact holes and/or trenches in a dielectric layer. A barrier layer is initially deposited on the dielectric layer lining the hole/trench. A thin conformal layer of copper or a copper alloy is sputter deposited on the barrier layer outside the hole/trench. Copper or a copper alloy is then electroplated on the conformal copper or copper alloy layer and filling the hole/trench. During electroplating, the barrier layer functions as a seed layer within the hole/trench while the sputter deposited conformal copper or copper alloy layer enhances the flow of electrons from the wafer edge inwardly to provide a favorable deposition rate.
Inventors
- 👤 Takeshi Nogami
- 👤 Valery Dubin
- 👤 Robin Cheung
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 13:05
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/042; H10W20/043; C; C23; C23C; C23C28/00; C23C28/02; C23C28/023; C25; C25D; C25D7/00; C25D7/12; C25D7/123; H05; H05K; H05K3/00; H05K3/40; H05K3/42; H05K3/423; H10P; H10P14/00; H10P14/40; H10P14/46; H10P14/47; H10W20/033; H10W20/056; H05K2201/00; H05K2201/03; H05K2201/0332; H05K2201/0364; H05K2201/0376; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09563; H05K2201/09818; H05K2201/09845; H05K3/02; H05K3/04; H05K3/045; H05K3/10; H05K3/107; H05K3/38; H05K3/388
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
124 words
A method of manufacturing a semiconductor device, the method comprising: forming an opening in a dielectric layer, the opening having side surfaces and exposing an upper surface of an underlying conductive region or conductive layer forming a bottom surface of the opening; depositing a barrier layer on an upper surface of the dielectric layer and lining the side surfaces and bottom surface of the opening; sputter depositing a substantially conformal layer of copper or copper alloy on the upper surface of the dielectric layer with the barrier layer therebetween; and electroplating copper or a copper alloy on the conformal Cu or Cu alloy layer and filling the opening, the barrier layer lining the opening functioning as a seed layer for electroplating within the opening.
Claim 2
Independent Claim
124 words
A method of manufacturing a semiconductor device, the method comprising: forming an opening in a dielectric layer, the opening having side surfaces and exposing an upper surface of an underlying conductive region or conductive layer forming a bottom surface of the opening; depositing a barrier layer on an upper surface of the dielectric layer and lining the side surfaces and bottom surface of the opening; sputter depositing a substantially conformal layer of copper or copper alloy on the upper surface of the dielectric layer with the barrier layer therebetween; and electroplating copper or a copper alloy on the conformal Cu or Cu alloy layer and filling the opening, the barrier layer lining the opening functioning as a seed layer for electroplating within the opening.
Claim 3
Dependent Claim
22 words
The method according to claim 1, comprising sputter depositing the substantially conformal layer at a thickness of about 150Å to about 500Å.
Claim 4
Dependent Claim
22 words
The method according to claim 2, comprising sputter depositing the substantially conformal layer at a thickness of about 150Å to about 300Å.
Claim 5
Dependent Claim
20 words
The method according to claim 1, wherein the sputter deposited substantially conformal layer does not function as a seed layer.
Claim 6
Dependent Claim
24 words
The method according to claim 1, wherein the barrier metal comprises tungsten, tungsten nitride, tungsten silicon nitride, titanium nitride, titanium silicon nitride or titanium-tungsten.
Claim 7
Dependent Claim
22 words
The method according to claim 1, comprising depositing the barrier metal at a thickness of about 50Å to about less than 1,000Å.
Claim 8
Dependent Claim
26 words
The method according to claim 1, wherein: the opening comprises a trench; and the electroplated copper or copper alloy filling the trench forms an interconnect line.
Claim 9
Dependent Claim
56 words
The method according to claim 7, wherein: the opening further comprises a via/contact hole communicating with the trench; and the electroplated copper or copper alloy filling the opening comprises a first portion filling the trench forming the interconnect line and a second portion filling the hole and forming a via/contact in electrical contact with the line.
Claim 10
Dependent Claim
26 words
The method according to claim 1, wherein: the opening comprises a contact/via hole; and the electroplated copper or copper alloy filling the hole forms a contact/via.
Claim 11
Dependent Claim
21 words
The method according to claim 1, comprising sputter depositing the substantially conformal layer by direct current or radio frequency magnetron sputtering.
Claim 12
Independent Claim
141 words
A method of manufacturing a semiconductor device, the method comprising: forming an opening in a dielectric layer, the opening having side surfaces and exposing an upper surface of an underlying conductive region or conductive layer forming a bottom surface of the opening; depositing a barrier layer on an upper surface of the dielectric layer and lining the side surfaces and bottom surface of the opening; sputter depositing a substantially conformal layer of copper or copper alloy on the upper surface of the dielectric layer with the barrier layer therebetween such that substantially no copper or copper alloy is deposited on the side surfaces of the opening; and electroplating copper or a copper alloy on the conformal Cu or Cu alloy layer and filling the opening, the barrier layer lining the opening functioning as a seed layer for electroplating within the opening.
Claim 13
Independent Claim
141 words
A method of manufacturing a semiconductor device, the method comprising: forming an opening in a dielectric layer, the opening having side surfaces and exposing an upper surface of an underlying conductive region or conductive layer forming a bottom surface of the opening; depositing a barrier layer on an upper surface of the dielectric layer and lining the side surfaces and bottom surface of the opening; sputter depositing a substantially conformal layer of copper or copper alloy on the upper surface of the dielectric layer with the barrier layer therebetween such that substantially no copper or copper alloy is deposited on the side surfaces of the opening; and electroplating copper or a copper alloy on the conformal Cu or Cu alloy layer and filling the opening, the barrier layer lining the opening functioning as a seed layer for electroplating within the opening.
Claim 14
Dependent Claim
29 words
The method according to claim 11, comprising sputter depositing the conformal layer such that substantially no copper or copper alloy is deposited on the bottom surface of the opening.
Claim 15
Dependent Claim
22 words
The method according to claim 11, comprising sputter depositing the substantially conformal layer at a thickness of about 150Å to about 500Å.
Claim 16
Dependent Claim
22 words
The method according to claim 13, comprising sputter depositing the substantially conformal layer at a thickness of about 150Å to about 300Å.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-10-18 | 2003-04-19 | 2003-10-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-10-18 | 2007-04-19 | 2007-10-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-10-18 | 2011-04-19 | 2011-10-19 | $7700.00 | Window Closed / Lapsed |