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US5950098A Expired / Lapsed US ⏱️ 0.0 years remaining

Manufacturing method of a semiconductor device with a silicide layer

Assignee: Mitsubishi Electric Corp
•
Filing: 1997-08-15
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Granted: 1999-09-07
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Expires: 2017-08-15
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Abstract

Abstract To form a silicide layer excellent in flatness, uniform in film thickness, and less in junction leak, by destroying the natural oxide film which adversely affects a formation of silicide layer of cobalt or nickel. A cobalt layer (7) is formed in a film thickness of 20 nm or less on an electrode layer (4A) of a gate electrode (4) and on source/drain diffusion layers (1, 2), and a nitrogen (8) is injected by the ion implantation at a density of about 1E15/cm 3 with an injection energy of 10 keV or more. At this time, the nitrogens (8) destroy the natural oxide film existing in the interface of the cobalt layer (7) and electrode layer (4A), and in the interface of the cobalt layer (7) and the source/drain diffusion layers (1, 2), and distribute deeply into the electrode layer (4A) and the source/drain diffusion layers (1, 2). Later, by a silicide forming reaction of cobalt, a silicide layer (6) is formed. Since the natural oxide film does not exist, the silicide forming reaction proceeds uniformly. Instead of the nitrogen (8), fluorine or silicon may be also used.

Inventors

  • 👤 Hidekazu Oda
  • 👤 Takashi Kuroi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 14:30
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/01; H10D30/021; H10D30/0223; H10D62/00; H10D62/80; H10D62/83; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/01308; H10D64/0131; H10D64/60; H10D64/62; H10D64/66; H10D64/661; H10D64/662; H10D64/663

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 148 words
A manufacturing method of a semiconductor device comprising: a step of forming a transistor on and in a principal surface of a semiconductor substrate of a first conductive type, said transistor comprising a gate oxide film, a gate electrode, and source/drain diffusion layers of a second conductive type; a step of depositing a metal as a non-reducing diffusion seed on respective upper surfaces of said gate electrode and said source and drain diffusion layers to form a metal layer; a step of injecting a mixing material from said metal layer toward an inside of said source/drain diffusion layers and an inside of said gate electrode by ion implantation, said mixing material having a property not spoiling the electric characteristic of said transistor; and a step of forming said metal layer after said injection into silicide to form silicide layers in said gate electrode and said source/drain diffusion layers.
Claim 2
Dependent Claim 148 words
A manufacturing method of a semiconductor device comprising: a step of forming a transistor on and in a principal surface of a semiconductor substrate of a first conductive type, said transistor comprising a gate oxide film, a gate electrode, and source/drain diffusion layers of a second conductive type; a step of depositing a metal as a non-reducing diffusion seed on respective upper surfaces of said gate electrode and said source and drain diffusion layers to form a metal layer; a step of injecting a mixing material from said metal layer toward an inside of said source/drain diffusion layers and an inside of said gate electrode by ion implantation, said mixing material having a property not spoiling the electric characteristic of said transistor; and a step of forming said metal layer after said injection into silicide to form silicide layers in said gate electrode and said source/drain diffusion layers.
Claim 3
Dependent Claim 34 words
A manufacturing method of a semiconductor device of claim 1, wherein said mixing material consists essentially of a material having a smaller activation energy than an ion injected when forming said source/drain diffusion layers.
Claim 4
Dependent Claim 17 words
manufacturing method of a semiconductor device of claim 1, wherein said mixing material consists essentially of nitrogen.
Claim 5
Dependent Claim 18 words
A manufacturing method of a semiconductor device of claim 1, wherein said mixing material consists essentially of fluorine.
Claim 6
Dependent Claim 22 words
A manufacturing method of a semiconductor device of claim 1, wherein said mixing material comprises an element for composing said semiconductor substrate.
Claim 7
Dependent Claim 40 words
A manufacturing method of a semiconductor device of claim 1, wherein said mixing material consists essentially of an element for composing said semiconductor substrate, and an element smaller in activation energy than an ioninjected when forming said source/drain diffusion layers.

References Cited (Backward Citations)

US4640004A Cited
US4829363A Cited
US4793896A Cited
US4793896C1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-09-06 2003-03-08 2003-09-07 $2000.00 Window Closed / Lapsed
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