US5945866A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and system for the reduction of off-state current in field effect transistors
Assignee: Penn State Research Foundation
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Filing: 1997-02-27
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Granted: 1999-08-31
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Expires: 2017-02-27
Abstract
Abstract A method for reducing the field dependence of an off-state current flow condition in a field-effect transistor having a source electrode, a drain electrode and a gate electrode, includes the steps of: applying a far off-state bias between the drain electrode and the gate electrode to drive a conduction channel in the field effect transistor into a far off-state; and applying a far off-state bias between the source electrode and the gate electrode to again drive the conduction channel into a far off-state; wherein both applying steps cause application of the far off-state bias for a sufficient time to reduce gate voltage dependency of off-state current flow in the conduction channel during a period when an off-state potential is applied to the gate electrode.
Inventors
- 👤 Stephen J. Fonash
- 👤 Xin Lin
- 👤 Anand Krishnan
- 👤 Vyshnavi Suntharalingam
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 16:56
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/20; G09G3/34; G09G3/36; G09G3/3611; G09G3/3648; G09G2310/00; G09G2310/06; G09G2320/00; G09G2320/02; G09G2320/0209; G09G2320/0214
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
122 words
A method for reducing field dependence of off-state current flow of a field-effect transistor having a source electrode, a drain electrode and a gate electrode, said method comprising the steps of: a) applying a far off-state forward stress mode voltage between said drain electrode and said gate electrode to drive a conduction channel in said field effect transistor into a far off-state; and b) applying said far off-state reverse stress mode voltage between said source electrode and said gate electrode to drive said conduction channel into said far off-state again; and wherein said applying steps a) and b) cause application of said far off-state voltages for a sufficient time to reduce gate voltage dependency of off-state current flow in said conduction channel.
Claim 2
Independent Claim
122 words
A method for reducing field dependence of off-state current flow of a field-effect transistor having a source electrode, a drain electrode and a gate electrode, said method comprising the steps of: a) applying a far off-state forward stress mode voltage between said drain electrode and said gate electrode to drive a conduction channel in said field effect transistor into a far off-state; and b) applying said far off-state reverse stress mode voltage between said source electrode and said gate electrode to drive said conduction channel into said far off-state again; and wherein said applying steps a) and b) cause application of said far off-state voltages for a sufficient time to reduce gate voltage dependency of off-state current flow in said conduction channel.
Claim 3
Dependent Claim
18 words
The method as recited in claim 1 wherein steps a) and b) are performed in a repeated manner.
Claim 4
Dependent Claim
35 words
The method as recited in claim 1 wherein said field effect transistor is configured as a thin film transistor and said source electrode and drain electrode connect to doped regions in a polycrystalline semiconductor layer.
Claim 5
Independent Claim
126 words
A method for reducing field dependence of off-state current flow of a field-effect transistor having a source region, a drain region and a gate electrode, said field effect transistor connected in a circuit, said method comprising the steps of: a) applying bias voltages to at least said source region and gate electrode to cause said transistor to achieve both on-state and off-state conditions during ordinary operation of said circuit; and b) repeatedly applying a far off-state voltage between at least one of said source and drain regions and said gate electrode to drive said field effect transistor into said far off-state for a sufficient time, during each application, to modify the dependency of off-state current flow in said field effect transistor when in the off-state condition.
Claim 6
Independent Claim
126 words
A method for reducing field dependence of off-state current flow of a field-effect transistor having a source region, a drain region and a gate electrode, said field effect transistor connected in a circuit, said method comprising the steps of: a) applying bias voltages to at least said source region and gate electrode to cause said transistor to achieve both on-state and off-state conditions during ordinary operation of said circuit; and b) repeatedly applying a far off-state voltage between at least one of said source and drain regions and said gate electrode to drive said field effect transistor into said far off-state for a sufficient time, during each application, to modify the dependency of off-state current flow in said field effect transistor when in the off-state condition.
Claim 7
Dependent Claim
36 words
The method as recited in claim 4 wherein step b) applies said far off-state voltage between said drain region and said gate electrode, and said source region and said gate electrode, in any order of application.
Claim 8
Dependent Claim
33 words
The method as recited in claim 5 wherein said field effect transistor is configured as a thin film transistor and said source region and drain region are configured into a polycrystalline semiconductor layer.
Claim 9
Dependent Claim
108 words
A field effect transistor circuit comprising: a) a gate electrode positioned on one surface of a dielectric layer; b) a silicon layer separated from said gate electrode by said dielectric layer and including a drain region and a source region; c) bias means connected to said gate electrode, and at least one of said source region and drain region for applying, between at least said gate electrode and said drain region, a potential which causes a conduction channel in said silicon layer to be driven into a far off-state conduction condition for a predetermined period of time, to achieve an alteration of off-state current flow in said transistor.
Claim 10
Dependent Claim
108 words
A field effect transistor circuit comprising: a) a gate electrode positioned on one surface of a dielectric layer; b) a silicon layer separated from said gate electrode by said dielectric layer and including a drain region and a source region; c) bias means connected to said gate electrode, and at least one of said source region and drain region for applying, between at least said gate electrode and said drain region, a potential which causes a conduction channel in said silicon layer to be driven into a far off-state conduction condition for a predetermined period of time, to achieve an alteration of off-state current flow in said transistor.
Claim 11
Dependent Claim
45 words
The field effect transistor circuit recited in claim 7, wherein said bias means further applies, between said gate electrode and said source region, a potential which causes said conduction channel to be driven into said far off-state conduction condition for a predetermined period of time.
References Cited (Backward Citations)
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