Method for mixed placement of structured and non-structured circuit elements

Claim 1

In an engineering workstation for automating electronic design, a software-implemented process for circuit placement, the process comprising the steps of: receiving a netlist file, the netlist file including a plurality of interconnected components; identifying which of the interconnected components belong to a structural portion and which belong to a non-structural portion according to bus signals; conducting a bus analysis to align the bus signals and to determine a usable bus, the bus analysis being performed with analytic tools; identifying a group of cells through set covering that have related connectivity; finding a group of cells to form a column; assigning cells to a bit slice based on a trace probability, wherein the step of assigning cells to a bit slice by use of a trace probability comprises the steps of: depth-first-sorting, from input to output, the cells such that each cell input does bit-slice assignment before its output cell, the depth-first-sorting accomplished by a cell-connectivity graph; b) calculating each cell potential probability for assigning the cell to every bit-slice bin; and c) adding all potential probability from each cell to determine entire circuit bit-slice traffic; d) assigning each cell to its highest probability bit-slice, the cell being assigned to the lowest bit-slice traffic of entire circuit for bit-slices that have the same probability; and e) repeating steps a) through d) until all cell finish bit-slice assignment; deriving an initial placement through simulated annealing; and generating a lay-out for defining physical placement of the interconnected components, the interconnected components identified as belonging to the structural portion being placed in a preferred area.