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US5928376A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for receiving a signal coded and modulated according to an ETS-HIPERLAN standard

Assignee: Ascom Tech AG
•
Filing: 1997-02-07
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Granted: 1999-07-27
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Expires: 2017-02-07
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Abstract

Abstract A method and apparatus for receiving a signal by the ETS/HIPERLAN standard. In the method decoding is done by the BCH standard. Differential pre-coding is done and integration for cancelling transmitter side differential pre-coding is done only after BCH encoding. The apparatus contains a non-coherent demodulation a BCH decoder and an integrator.

Inventors

  • 👤 Uwe Dettmar
  • 👤 Armin Wittneben
  • 👤 Weilin Liu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 14:06
CPC Classifications
H; H04; H04L; H04L1/00

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 86 words
A process for transmitting and receiving a signal comprising the steps of: (a) first, BCH encoding the signal in accordance with ETS-HIPERLAN standard, (b) second, differential pre-coding of the encoded signal in accordance with ETS-HIPERLAN standard, (c) modulating the pre-coded signal with a GMSK modulator, (d) demodulating the modulated signal with a non-coherent demodulator, (e) BCH decoding the demodulated signal, and (f) integrating the decoded signal for cancelling transmitter-side differential pre-coding wherein said integrating step for cancelling transmitter-side differential pre-coding is executed only after BCH decoding.
Claim 2
Dependent Claim 86 words
A process for transmitting and receiving a signal comprising the steps of: (a) first, BCH encoding the signal in accordance with ETS-HIPERLAN standard, (b) second, differential pre-coding of the encoded signal in accordance with ETS-HIPERLAN standard, (c) modulating the pre-coded signal with a GMSK modulator, (d) demodulating the modulated signal with a non-coherent demodulator, (e) BCH decoding the demodulated signal, and (f) integrating the decoded signal for cancelling transmitter-side differential pre-coding wherein said integrating step for cancelling transmitter-side differential pre-coding is executed only after BCH decoding.
Claim 3
Dependent Claim 23 words
A process according to claim 1, wherein in BCH decoding the first code word of a data packet is excluded by error correction.
Claim 4
Dependent Claim 28 words
A process according to claim 2, wherein the first code word is decoded with a soft-decision decoding process which ignores only the first bit of the code word.
Claim 5
Dependent Claim 18 words
A process according to claim 3, wherein the soft-decision decoding process operates according to an erasure decoding principle.
Claim 6
Dependent Claim 21 words
A process according to claim 4, wherein the last bit of a preceding synchronization sequence is used for initialization in integrating.
Claim 7
Dependent Claim 21 words
A process according to claim 3, wherein the last bit of a preceding synchronization sequence is used for initialization in integrating.
Claim 8
Dependent Claim 21 words
A process according to claim 2, wherein the last bit of a preceding synchronization sequence is used for initialization in integrating.
Claim 9
Dependent Claim 21 words
A process according to claim 1, wherein the last bit of a preceding synchronization sequence is used for initialization in integrating.
Claim 10
Dependent Claim 51 words
A circuit comprising: means for receiving a GMSK modulated signal, a non-coherent demodulator that demodulates the received GMSK modulated signal, a BCH decoder that decodes a signal derived from the demodulated signal, and an integrator, wherein the integrator follows BCH decoder as defined by signal flow for cancelling of differential precoding.
Claim 11
Dependent Claim 51 words
A circuit comprising: means for receiving a GMSK modulated signal, a non-coherent demodulator that demodulates the received GMSK modulated signal, a BCH decoder that decodes a signal derived from the demodulated signal, and an integrator, wherein the integrator follows BCH decoder as defined by signal flow for cancelling of differential precoding.

References Cited (Backward Citations)

US4553237A Cited
US5168509A Cited
US5222077A Cited
US5412687A Cited
US5706313A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-07-26 2003-01-25 2003-07-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-07-26 2007-01-25 2007-07-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-07-26 2011-01-25 2011-07-27 $7700.00 Window Closed / Lapsed

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