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US5923091A
Expired / Lapsed
US
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Bonded semiconductor integrated circuit device
Assignee: Renesas Electronics Corp
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Filing: 1997-08-26
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Granted: 1999-07-13
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Expires: 2017-08-26
Abstract
Abstract Cells and wiring patterns constituting a single integrated circuit device are divided into two or more parts to be formed on two or more semiconductor chips, respectively. The semiconductor chips are bonded face-to-face to each other so that the I/O pins of the cells are connected to each other. Thus, the length of the wiring pattern connecting the cells to each other can be shortened.
Inventors
- 👤 Takao Nagai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 09:55
CPC Classifications
H; H10; H10W; H10W90/00; H10W72/00; H10W72/01; H10W90/701; H10W90/721; H10W90/722
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
91 words
A semiconductor integrated circuit device comprising an assembly of a plurality of cells each comprising an integrated circuit and a plurality of wiring patterns which together constitute a prescribed integrated circuit pattern, wherein said pluralities of cells and wiring patterns are structurally divided into a plurality of discrete parts and formed on respective semiconductor chips, and surfaces of the integrated circuits formed on said plurality of semiconductor chips are directly bonded face-to-face to each other to constitute said prescribed integrated circuit pattern and to reduce the length of said wiring patterns.
Claim 2
Dependent Claim
91 words
A semiconductor integrated circuit device comprising an assembly of a plurality of cells each comprising an integrated circuit and a plurality of wiring patterns which together constitute a prescribed integrated circuit pattern, wherein said pluralities of cells and wiring patterns are structurally divided into a plurality of discrete parts and formed on respective semiconductor chips, and surfaces of the integrated circuits formed on said plurality of semiconductor chips are directly bonded face-to-face to each other to constitute said prescribed integrated circuit pattern and to reduce the length of said wiring patterns.
Claim 3
Dependent Claim
29 words
A semiconductor integrated circuit device according to claim 1, wherein said cells are structurally divided into a plurality of sub-groups of cells and formed on said respective semiconductor chips.
Claim 4
Dependent Claim
39 words
A semiconductor integrated circuit device according to claim 1, wherein said cells and said wiring patterns are structurally divided into a group of cells and a group of wiring patterns, said groups being formed on the respective semiconductor chips.
Claim 5
Dependent Claim
45 words
A semiconductor integrated circuit device according to claim 3, wherein said cells and said wiring patterns are structurally divided into a group of cells and a group of wiring patterns including a power source and a GND, which are formed on the respective semiconductor chips.
Claim 6
Dependent Claim
28 words
A semiconductor integrated circuit device according to claim 1, wherein I/O terminals of said cells formed on said chips are connected by said face-to-face bonding of said chips.
Claim 7
Dependent Claim
19 words
A semiconductor integrated circuit device according to claim 1, wherein said divided parts are fabricated by different process technologies.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-07-12 | 2003-01-11 | 2003-07-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-07-12 | 2007-01-11 | 2007-07-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-07-12 | 2011-01-11 | 2011-07-13 | $7700.00 | Window Closed / Lapsed |