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US5889781A Expired / Lapsed US ⏱️ 0.0 years remaining

Asynchronous timing generator

Assignee: Philips Semiconductors Inc
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Filing: 1996-06-11
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Granted: 1999-03-30
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Expires: 2016-06-11
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Abstract

Abstract The asynchronous timing generator is comprised of a clock signal generator that generates a master clock signal. The master clock signal is used by a master clock counter to generate a bit clock. The master clock counter divides the master clock signal's frequency down to a lower frequency. Control signal information is extracted from the data stream's slot-framing to control the use of a predefined count value to a variable counter. The variable counter uses this lower frequency clock signal to generate the sub-bit count clock signal and slot bit numbers. These signals are generated in response to the control signals, coupled to the timer, indicating the different fields of the slot used to resynchronize data recovery in the received stream. In a preferred embodiment, the asynchronous timing generator is used in a communications transceiver device to permit resynchronization of received communications data.

Inventors

  • 👤 Michel Eftimakis
  • 👤 Gianmaria Mazzucchelli

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 23:41
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/04; H04L7/041; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0635; H04J3/0685

Claims Analysis

Total Claims: 46
Claim 1
Independent Claim 162 words
An asynchronous timing generator that generates a sub-bit count clock signal that is based on a data stream, the data stream comprised of a field and a subfield, the field and the subfield each having a respective defined position in the data stream, the generator comprising: a clock signal generator for generating a master clock signal; a master clock counter, coupled to the clock signal generator, for generating a bit clock signal by dividing the frequency of the master clock signal to a predetermined bit clock frequency that is lower than the master clock frequency; a controller, responsive to the data stream, for generating a count value signal, wherein the count value signal is representative of the respective defined position in the data stream; and a variable counter, responsive to the count value signal, the bit clock signal, and the data stream, for generating the sub-bit count clock signal and a slot-related value representative of the respective position in the data stream.
Claim 2
Dependent Claim 162 words
An asynchronous timing generator that generates a sub-bit count clock signal that is based on a data stream, the data stream comprised of a field and a subfield, the field and the subfield each having a respective defined position in the data stream, the generator comprising: a clock signal generator for generating a master clock signal; a master clock counter, coupled to the clock signal generator, for generating a bit clock signal by dividing the frequency of the master clock signal to a predetermined bit clock frequency that is lower than the master clock frequency; a controller, responsive to the data stream, for generating a count value signal, wherein the count value signal is representative of the respective defined position in the data stream; and a variable counter, responsive to the count value signal, the bit clock signal, and the data stream, for generating the sub-bit count clock signal and a slot-related value representative of the respective position in the data stream.
Claim 3
Dependent Claim 34 words
The generator of claim 1 and further including a sub-count counter, coupled to the variable counter, for generating a sub-field clock signal from the sub-bit count clock signal, for counting repetitions of a sub-field.
Claim 4
Dependent Claim 18 words
The generator of claim 1, wherein the sub-bit count clock signal is used to clock radiotelephone data frames.
Claim 5
Dependent Claim 21 words
The generator of claim 1, wherein the sub-bit clock signal is used as a seed value signal coupled to a processor.
Claim 6
Dependent Claim 136 words
An asynchronous timing generator that generates a sub-bit count clock signal that is synchronized to a data stream, the generator comprising: a clock signal generator for generating a master clock signal; a master clock counter, coupled to the clock signal generator, for generating a bit clock signal by dividing the frequency of the master clock signal to a predetermined bit clock frequency that is lower than the master clock frequency; a controller for generating a plurality of control lines, each control line representative of a respective position in the data stream; and a variable counter, coupled to the master clock counter and the controller, for generating, in response to the plurality of control lines and the bit clock frequency, the sub-bit count clock signal and a bit number indicating a specific position in the data stream.
Claim 7
Dependent Claim 136 words
An asynchronous timing generator that generates a sub-bit count clock signal that is synchronized to a data stream, the generator comprising: a clock signal generator for generating a master clock signal; a master clock counter, coupled to the clock signal generator, for generating a bit clock signal by dividing the frequency of the master clock signal to a predetermined bit clock frequency that is lower than the master clock frequency; a controller for generating a plurality of control lines, each control line representative of a respective position in the data stream; and a variable counter, coupled to the master clock counter and the controller, for generating, in response to the plurality of control lines and the bit clock frequency, the sub-bit count clock signal and a bit number indicating a specific position in the data stream.
Claim 8
Dependent Claim 15 words
The generator of claim 5, wherein the sub-bit count clock signal clocks radiotelephone data frames.
Claim 9
Dependent Claim 30 words
The asynchronous timing generator of claim 5 and further including a radio interface, coupled to the controller, for providing data to the controller from which the control lines are generated.
Claim 10
Dependent Claim 19 words
The generator of claim 7, wherein the data from the radio interface are data frames received over a channel.
Claim 11
Dependent Claim 165 words
An asynchronous timing generator that generates a sub-bit count clock signal that is synchronized to data slots, the generator comprising: a clock signal generator for generating the master clock signal; a master clock counter, coupled to the clock signal generator, for generating a bit clock signal by dividing the frequency of the master clock signal to a predetermined bit clock frequency that is lower than the master clock frequency; a controller for generating a plurality of control lines in response to a data stream, each control line indicating a field or subfield position in the data stream; a variable counter, coupled to the master clock counter and the controller, for generating, in response to the plurality of control lines and the bit clock signal, the sub-bit count clock signal and a bit number indicating a position in the data stream; and a data formatter, coupled to the variable counter, for storing and retrieving data in response to the bit number and sub-bit count clock signal.
Claim 12
Dependent Claim 165 words
An asynchronous timing generator that generates a sub-bit count clock signal that is synchronized to data slots, the generator comprising: a clock signal generator for generating the master clock signal; a master clock counter, coupled to the clock signal generator, for generating a bit clock signal by dividing the frequency of the master clock signal to a predetermined bit clock frequency that is lower than the master clock frequency; a controller for generating a plurality of control lines in response to a data stream, each control line indicating a field or subfield position in the data stream; a variable counter, coupled to the master clock counter and the controller, for generating, in response to the plurality of control lines and the bit clock signal, the sub-bit count clock signal and a bit number indicating a position in the data stream; and a data formatter, coupled to the variable counter, for storing and retrieving data in response to the bit number and sub-bit count clock signal.
Claim 13
Dependent Claim 14 words
The generator of claim 9, wherein the data formatter stores and retrieves radiotelephone data.
Claim 14
Dependent Claim 29 words
The generator of claim 9 and further including a radio interface, coupled to the controller, for generating the data stream in response to information received over a radio channel.
Claim 15
Dependent Claim 33 words
The generator of claim 9 and further including an external synchronization circuit coupled to the variable counter, the external synchronization circuit producing a synchronization pulse to synchronize the counter to an external source.
Claim 16
Dependent Claim 35 words
The generator of claim 9 and further including an internal synchronization circuit couple to the variable counter, the internal synchronization circuit receiving a synchronization pulse from the counter to synchronize external sources to the counter.
Claim 17
Independent Claim 76 words
A method for decoding a received data stream of slots having a plurality of fields and sub-fields, the method comprising the steps of: generating control signals in response to the plurality of fields and sub-fields; generating a master clock signal; generating a sub-bit clock signal and a bit position in response to the control signals and the master clock signal; and decoding the data stream in response to the sub-bit clock signal and the bit position.
Claim 18
Independent Claim 76 words
A method for decoding a received data stream of slots having a plurality of fields and sub-fields, the method comprising the steps of: generating control signals in response to the plurality of fields and sub-fields; generating a master clock signal; generating a sub-bit clock signal and a bit position in response to the control signals and the master clock signal; and decoding the data stream in response to the sub-bit clock signal and the bit position.
Claim 19
Dependent Claim 32 words
The method of claim 14, and further including the step of changing the decoded data stream to an analog format to be radiated by a speaker in the form of sound waves.
Claim 20
Dependent Claim 23 words
The method of claim 14, and further including the step of coupling the decoded data stream to a computer for further data processing.
Claim 21
Dependent Claim 16 words
The method of claim 14 and further including the step of storing the decoded data stream.
Claim 22
Independent Claim 86 words
A method for transmitting a data stream of slots having a plurality of fields and sub-fields, the method comprising the steps of: generating a plurality of control signals to indicate locations of the plurality of fields and sub-fields; generating a master clock signal; generating a sub-bit clock signal and a bit position in a slot in response to the control signals and the master clock signal; and encoding the slots, in response to the sub-bit clock signal and the bit position, into the fields and sub-fields.
Claim 23
Independent Claim 86 words
A method for transmitting a data stream of slots having a plurality of fields and sub-fields, the method comprising the steps of: generating a plurality of control signals to indicate locations of the plurality of fields and sub-fields; generating a master clock signal; generating a sub-bit clock signal and a bit position in a slot in response to the control signals and the master clock signal; and encoding the slots, in response to the sub-bit clock signal and the bit position, into the fields and sub-fields.
Claim 24
Dependent Claim 19 words
The method of claim 18 and further including the step of retrieving data from a memory to be encoded.
Claim 25
Dependent Claim 177 words
A radiotelephone that operates in a digital radiotelephone system, the radiotelephone comprising: a receiver for receiving information over a first radio channel; a transmitter for transmitting information over a second radio channel; a radio interface for converting the received information into a received data stream comprising slots and for converting a data stream to be transmitted, comprising slots, into the transmitted information; a clock signal generator for generating a master clock signal; a master clock counter, coupled to the clock signal generator, for generating a bit clock signal by dividing the frequency of the master clock signal to a predetermined bit clock frequency that is lower than the master clock frequency; a controller for generating a plurality of control lines, each control line indicating a position in the received and transmitted slots; and a variable counter, coupled to the master clock counter and the controller, for generating, in response to the plurality of control lines and the bit clock frequency, the sub-bit count clock signal and a slot-related bit number indicating a position in the data stream.
Claim 26
Dependent Claim 177 words
A radiotelephone that operates in a digital radiotelephone system, the radiotelephone comprising: a receiver for receiving information over a first radio channel; a transmitter for transmitting information over a second radio channel; a radio interface for converting the received information into a received data stream comprising slots and for converting a data stream to be transmitted, comprising slots, into the transmitted information; a clock signal generator for generating a master clock signal; a master clock counter, coupled to the clock signal generator, for generating a bit clock signal by dividing the frequency of the master clock signal to a predetermined bit clock frequency that is lower than the master clock frequency; a controller for generating a plurality of control lines, each control line indicating a position in the received and transmitted slots; and a variable counter, coupled to the master clock counter and the controller, for generating, in response to the plurality of control lines and the bit clock frequency, the sub-bit count clock signal and a slot-related bit number indicating a position in the data stream.
Claim 27
Dependent Claim 15 words
The radiotelephone of claim 20, wherein the sub-bit count clock signal clocks radiotelephone data frames.
Claim 28
Dependent Claim 129 words
A data processing apparatus for coupling a radio interface to memory, the apparatus comprising: a memory controller, coupled to the memory, for arbitrating access to the memory; a controlling processor for controlling the apparatus, the controlling processor coupled to the memory controller; a data processor, coupled between the radio interface and the controlling processor, for decoding information received from the radio interface into a format to be stored in the memory and for encoding data stored in the memory to be transmitted by the radio interface; an encryption/decryption device, coupled to the data processor, for encrypting the data to be transmitted and decrypting the information received from the radio interface; and a synchronization port, coupled to the data processor, for synchronizing external data elements to the data processing apparatus.
Claim 29
Dependent Claim 129 words
A data processing apparatus for coupling a radio interface to memory, the apparatus comprising: a memory controller, coupled to the memory, for arbitrating access to the memory; a controlling processor for controlling the apparatus, the controlling processor coupled to the memory controller; a data processor, coupled between the radio interface and the controlling processor, for decoding information received from the radio interface into a format to be stored in the memory and for encoding data stored in the memory to be transmitted by the radio interface; an encryption/decryption device, coupled to the data processor, for encrypting the data to be transmitted and decrypting the information received from the radio interface; and a synchronization port, coupled to the data processor, for synchronizing external data elements to the data processing apparatus.
Claim 30
Dependent Claim 19 words
The apparatus of claim 22, wherein the radio interface couples a radio transmitter and radio receiver to the apparatus.
Claim 31
Dependent Claim 115 words
A communications receiver system, for receiving a data stream, comprised of communications data signals transmitted in a frame format wherein each frame is comprised of a plurality of slots, wherein during transmission each slot begins after a related slot, the communications receiver system comprising: means for receiving the transmitted data stream having a predefined format comprised of a plurality of fields having a predefined format; formatter means for extracting timing information from the data stream and providing an output comprised of a bit number within the slot, the slot number within a frame, and the current field being operated upon; and means for storing and retrieving communications data signals responsive to said formatter means output.
Claim 32
Dependent Claim 115 words
A communications receiver system, for receiving a data stream, comprised of communications data signals transmitted in a frame format wherein each frame is comprised of a plurality of slots, wherein during transmission each slot begins after a related slot, the communications receiver system comprising: means for receiving the transmitted data stream having a predefined format comprised of a plurality of fields having a predefined format; formatter means for extracting timing information from the data stream and providing an output comprised of a bit number within the slot, the slot number within a frame, and the current field being operated upon; and means for storing and retrieving communications data signals responsive to said formatter means output.
Claim 33
Dependent Claim 23 words
The system of claim 24, wherein at least one field is comprised of a variable integer number of a plurality of said fields.
Claim 34
Dependent Claim 29 words
The system as in claim 24, wherein the related slots are comprised of a receive slot and a transmit slot which as a pair correspond to a communication channel.
Claim 35
Dependent Claim 111 words
An asynchronous timing generator for time-shift tracking and generating a sub-bit count clock signal based on a data stream, said generator comprising: a clock signal generator for generating a master clock signal; means for generating a bit clock output by dividing the master clock signal to a predetermined bit clock frequency lower than the master clock frequency, a variable counter, coupled to the master clock counter and the data stream, for generating the sub-bit count clock signal and a slot position output responsive to the data processing means and the bit clock output; and means for storing and retrieving data from the data stream responsive to the sub-bit count clock signal.
Claim 36
Dependent Claim 111 words
An asynchronous timing generator for time-shift tracking and generating a sub-bit count clock signal based on a data stream, said generator comprising: a clock signal generator for generating a master clock signal; means for generating a bit clock output by dividing the master clock signal to a predetermined bit clock frequency lower than the master clock frequency, a variable counter, coupled to the master clock counter and the data stream, for generating the sub-bit count clock signal and a slot position output responsive to the data processing means and the bit clock output; and means for storing and retrieving data from the data stream responsive to the sub-bit count clock signal.
Claim 37
Dependent Claim 85 words
An asynchronous timer system for permitting asynchronous communication of data in a synchronous fixed-slot, data framing communications system, said asynchronous timer system comprising: means for detecting delays between transmit and receive data packets, means for adjusting receiver timing control circuitry responsive to decoding and tracking the fixed-slot data framing to compensate for the variable delays between the transmit and receive data packets; and means for maintaining a synchronous connection and selectively storing and retrieving the data from a memory responsive to the means for adjusting.
Claim 38
Dependent Claim 85 words
An asynchronous timer system for permitting asynchronous communication of data in a synchronous fixed-slot, data framing communications system, said asynchronous timer system comprising: means for detecting delays between transmit and receive data packets, means for adjusting receiver timing control circuitry responsive to decoding and tracking the fixed-slot data framing to compensate for the variable delays between the transmit and receive data packets; and means for maintaining a synchronous connection and selectively storing and retrieving the data from a memory responsive to the means for adjusting.
Claim 39
Dependent Claim 159 words
A communications receiver system, for receiving a data stream transmitted in synchronization with a pre-defined clock rate providing synchronous timing, in a frame transmission having a plurality of frames, each frame having a plurality of slots, each slot having one or more fields, the communications receiver system comprising: clock generator means for generating a clock signal at the fixed clock rate of the transmitter; position decoder means, responsive to the received data stream, and the clock signal, for correlating data stream bit position independent of said synchronous timing of the transmitted data stream, and providing a bit position signal output; programmable timer means, for providing a bit position clock signal output, asynchronous to the corresponding originating transmitter clock signal output corresponding to that transmitted bit position responsive to the clock signal and the bit position signal; and memory for storing and retrieving information from the data stream responsive to the bit position clock signal output and the data stream.
Claim 40
Dependent Claim 159 words
A communications receiver system, for receiving a data stream transmitted in synchronization with a pre-defined clock rate providing synchronous timing, in a frame transmission having a plurality of frames, each frame having a plurality of slots, each slot having one or more fields, the communications receiver system comprising: clock generator means for generating a clock signal at the fixed clock rate of the transmitter; position decoder means, responsive to the received data stream, and the clock signal, for correlating data stream bit position independent of said synchronous timing of the transmitted data stream, and providing a bit position signal output; programmable timer means, for providing a bit position clock signal output, asynchronous to the corresponding originating transmitter clock signal output corresponding to that transmitted bit position responsive to the clock signal and the bit position signal; and memory for storing and retrieving information from the data stream responsive to the bit position clock signal output and the data stream.
Claim 41
Dependent Claim 19 words
The system of claim 29, wherein at least one of said fields has a variable number of like-type fields.
Claim 42
Independent Claim 146 words
A method for communication, for receiving a data stream transmitted in synchronization with an originating transmitter clock signal at a predefined clock rate, in a frame transmission, having a plurality of frames, each frame having a plurality of slots, each slot having one or more fields, the method comprising: generating a clock signal at the fixed clock rate of the transmitter; correlating data seam bit position independent of absolute timing, and providing a bit position signal output, responsive to the received data stream, and the clock signal; generating a bit position clock signal output, asynchronous to the corresponding originating transmitter clock signal output corresponding to that transmitted bit position responsive to the clock signal and the bit position signal; and storing and retrieving information from the data steam into and from a memory circuit responsive to the bit position clock signal output and the data stream.
Claim 43
Independent Claim 146 words
A method for communication, for receiving a data stream transmitted in synchronization with an originating transmitter clock signal at a predefined clock rate, in a frame transmission, having a plurality of frames, each frame having a plurality of slots, each slot having one or more fields, the method comprising: generating a clock signal at the fixed clock rate of the transmitter; correlating data seam bit position independent of absolute timing, and providing a bit position signal output, responsive to the received data stream, and the clock signal; generating a bit position clock signal output, asynchronous to the corresponding originating transmitter clock signal output corresponding to that transmitted bit position responsive to the clock signal and the bit position signal; and storing and retrieving information from the data steam into and from a memory circuit responsive to the bit position clock signal output and the data stream.
Claim 44
Dependent Claim 21 words
A method as in claim 31, wherein at least one of the fields has a variable number of like type fields.
Claim 45
Dependent Claim 166 words
A communications receiver system, for receiving a data stream transmitted at a predefined bit clock rate in frames, each frame comprised of a plurality of slots, each slot comprised of a plurality of fields which is variable within a predefined range, said system comprising: a master clock generator for generating a master clock signal; a master clock counter for generating a bit clock signal at the predefined bit clock rate responsive to the master clock signal; control means, responsive to the data stream, for outputting a control signal representative of the field position in the data stream; programmable counter means, coupled to the master clock counter and the control means, for generating a sub-bit clock signal and a bit number position signal responsive to the control signal and the bit clock signal, by dividing the bit clock signal by a count number programmed responsive to the control means; and means for storing and retrieving received data from the data steam responsive to the programmable counter means.
Claim 46
Dependent Claim 166 words
A communications receiver system, for receiving a data stream transmitted at a predefined bit clock rate in frames, each frame comprised of a plurality of slots, each slot comprised of a plurality of fields which is variable within a predefined range, said system comprising: a master clock generator for generating a master clock signal; a master clock counter for generating a bit clock signal at the predefined bit clock rate responsive to the master clock signal; control means, responsive to the data stream, for outputting a control signal representative of the field position in the data stream; programmable counter means, coupled to the master clock counter and the control means, for generating a sub-bit clock signal and a bit number position signal responsive to the control signal and the bit clock signal, by dividing the bit clock signal by a count number programmed responsive to the control means; and means for storing and retrieving received data from the data steam responsive to the programmable counter means.

References Cited (Backward Citations)

US4053715A Cited
US4353128A Cited
US4748617A Cited
US5172396A Cited
US5581748A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-03-29 2002-09-28 2003-03-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-03-29 2006-09-28 2007-03-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-03-29 2010-09-28 2011-03-30 $7700.00 Window Closed / Lapsed

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