US5877611A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Simple and efficient switching regulator for fast transient loads such as microprocessors
Assignee: Lineage Overseas Corp
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Filing: 1997-10-08
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Granted: 1999-03-02
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Expires: 2017-10-08
Abstract
Abstract A buck switching DC-to-DC regulator having a resistor and capacitor in combination across the storage inductor to measure output current and voltage. The resistor connects to the input of the inductor and the capacitor to the output of the inductor. The junction of the resistor and capacitor connects to an error amplifier for controlling the switching regulator. The regulator may be paralleled for more output current by connecting the outputs together and providing a common reference voltage to all the regulators.
Inventors
- 👤 Milivoje Slobodan Brkovic
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 04:08
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/10; H02M3/145; H02M3/155; H02M3/156; G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/575; H02M1/00; H02M1/0003; H02M1/0009
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
88 words
In a computing system, a switching regulator for powering a load including a microprocessor, the switching regulator having a switch, an inductor and a filter capacitor coupled in series at junctions, and an error amplifier having an input for controlling the switch, CHARACTERIZED BY: a first resistor coupled to the junction between the switch and the inductor; a capacitor connected to the first resistor at a node and to the junction between the inductor and the filter capacitor; wherein the node is coupled to the error amplifier input.
Claim 2
Dependent Claim
88 words
In a computing system, a switching regulator for powering a load including a microprocessor, the switching regulator having a switch, an inductor and a filter capacitor coupled in series at junctions, and an error amplifier having an input for controlling the switch, CHARACTERIZED BY: a first resistor coupled to the junction between the switch and the inductor; a capacitor connected to the first resistor at a node and to the junction between the inductor and the filter capacitor; wherein the node is coupled to the error amplifier input.
Claim 3
Dependent Claim
20 words
The computing system as recited in claim 1, further characterized by a second resistor disposed in parallel with the capacitor.
Claim 4
Dependent Claim
38 words
The computing system as recited in claim 1, further characterized by the error amplifier having an output coupled to the switch, an inverting input coupled to the node and a non-inverting input being coupled to a reference voltage.
Claim 5
Dependent Claim
41 words
The computing system as recited in claim 3, further characterized by: a first impedance coupled between the node and the inverting input of the error amplifier; and a second impedance disposed between the output and inverting input of the error amplifier.
Claim 6
Dependent Claim
42 words
The computing system as recited in claim 4, further characterized by a third resistor connected to the error amplifier inverting input, wherein the third resistor and first impedance substantially determines the output voltage of the regulator in proportion to the reference voltage.
Claim 7
Dependent Claim
28 words
The computing system as recited in claim 3, further comprising a plurality of power supplies having a common reference voltage and a common output coupled to the load.
Claim 8
Dependent Claim
17 words
The computing system as recited in claim 3, wherein the switching regulator is a buck switching regulator.
Claim 9
Dependent Claim
22 words
The computing system as recited in claim 7, further comprising a diode coupled to the junction of the switch and the inductor.
Claim 10
Dependent Claim
26 words
The computing system as recited in claim 3, wherein the error amplifier includes a pulse-width modulator for controlling the switch's opening and closing duration and frequency.
Claim 11
Dependent Claim
15 words
The computing system as recited in claim 9, wherein the switch further includes a MOSFET.
Claim 12
Dependent Claim
74 words
A switching regulator having a switch, an inductor and a filter capacitor coupled in series at junctions, and an error amplifier having an input for controlling the switch, CHARACTERIZED BY: a first resistor coupled to the junction between the switch and the inductor; a capacitor connected to the first resistor at a node and to the junction between the inductor and the filter capacitor; wherein the node is coupled to the error amplifier input.
Claim 13
Dependent Claim
74 words
A switching regulator having a switch, an inductor and a filter capacitor coupled in series at junctions, and an error amplifier having an input for controlling the switch, CHARACTERIZED BY: a first resistor coupled to the junction between the switch and the inductor; a capacitor connected to the first resistor at a node and to the junction between the inductor and the filter capacitor; wherein the node is coupled to the error amplifier input.
Claim 14
Dependent Claim
20 words
The computing system as recited in claim 11, further characterized by a second resistor disposed in parallel with the capacitor.
Claim 15
Dependent Claim
38 words
The computing system as recited in claim 11, further characterized by the error amplifier having an output coupled to the switch, an inverting input coupled to the node and a non-inverting input being coupled to a reference voltage.
Claim 16
Dependent Claim
41 words
The computing system as recited in claim 13, further characterized by: a first impedance coupled between the node and the inverting input of the error amplifier; and a second impedance disposed between the output and inverting input of the error amplifier.
Claim 17
Dependent Claim
42 words
The computing system as recited in claim 14, further characterized by a third resistor connected to the error amplifier inverting input, wherein the third resistor and first impedance substantially determines the output voltage of the regulator in proportion to the reference voltage.
Claim 18
Dependent Claim
28 words
The computing system as recited in claim 13, further comprising a plurality of power supplies having a common reference voltage and a common output coupled to the load.
Claim 19
Dependent Claim
17 words
The computing system as recited in claim 13, wherein the switching regulator is a buck switching regulator.
Claim 20
Dependent Claim
22 words
The computing system as recited in claim 17, further comprising a diode coupled to the junction of the switch and the inductor.
Claim 21
Dependent Claim
26 words
The computing system as recited in claim 13, wherein the error amplifier includes a pulse-width modulator for controlling the switch's opening and closing duration and frequency.
Claim 22
Dependent Claim
15 words
The computing system as recited in claim 19, wherein the switch further includes a MOSFET.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-01 | 2002-08-31 | 2003-03-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-01 | 2006-08-31 | 2007-03-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-01 | 2010-08-31 | 2011-03-02 | $7700.00 | Window Closed / Lapsed |