US5874330A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for fabricating semiconductor device
Assignee: SK Hynix Inc
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Filing: 1996-11-06
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Granted: 1999-02-23
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Expires: 2016-11-06
Abstract
Abstract A method for fabricating a semiconductor device having a substrate includes the steps of defining a first region and a second region in the substrate, forming a gate insulator over the substrate at each of the first and second regions, forming a gate electrode over the gate insulator and forming impurity regions in the substrate at adjacent sides of the gate electrode in each of the first and second regions, forming a first insulating layer on top and at sides of the gate electrode in the first region, forming a second insulating layer on the first insulating layer at the first region and on the gate electrode of the second region, removing the second insulating layer by selective etching and forming gate sidewalls at the second region, and forming lightly doped drain areas by injecting ions using the gate sidewalls at the second region and the second insulating layer at the first region as masks.
Inventors
- 👤 Jae Gyung Ahn
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 09:26
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/05; H10D; H10D64/00; H10D64/01; H10D64/011
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
189 words
A method for fabricating a semiconductor device having a substrate, the method comprising the steps of: defining a cell region and a peripheral region in the substrate; forming a gate insulator over the substrate at each of the cell and peripheral regions; forming a gate electrode over the gate insulator and forming first impurity regions in the substrate at adjacent sides of the gate electrode in each of the cell and peripheral regions; forming a first insulating layer of a nitride on top and at sides of the gate electrode in the cell region to form nitride spacers on sides of the gate electrode in the cell region and a nitride cap over the gate electrode in the cell region; forming a second insulating layer of an oxide on the first insulating layer at the cell region and on the gate electrode of the peripheral region; removing the second insulating layer by selective etching and forming gate sidewalls at the peripheral region; and forming second impurity regions by injecting ions using the gate sidewalls at the peripheral region and the second insulating layer at the cell region as masks.
Claim 2
Independent Claim
189 words
A method for fabricating a semiconductor device having a substrate, the method comprising the steps of: defining a cell region and a peripheral region in the substrate; forming a gate insulator over the substrate at each of the cell and peripheral regions; forming a gate electrode over the gate insulator and forming first impurity regions in the substrate at adjacent sides of the gate electrode in each of the cell and peripheral regions; forming a first insulating layer of a nitride on top and at sides of the gate electrode in the cell region to form nitride spacers on sides of the gate electrode in the cell region and a nitride cap over the gate electrode in the cell region; forming a second insulating layer of an oxide on the first insulating layer at the cell region and on the gate electrode of the peripheral region; removing the second insulating layer by selective etching and forming gate sidewalls at the peripheral region; and forming second impurity regions by injecting ions using the gate sidewalls at the peripheral region and the second insulating layer at the cell region as masks.
Claim 3
Dependent Claim
32 words
A method as claimed in claim 1, wherein a thickness of the second insulating layer in the first region is dependent on a width of the gate sidewalls in the second region.
Claim 4
Dependent Claim
43 words
A method as claimed in claim 1, further comprising the steps of: forming a third insulating layer on a resultant structure at the first and second regions; and forming a contact hole at the first region through the second and third insulating layers.
Claim 5
Independent Claim
277 words
A method for fabricating a semiconductor device having a substrate, the method comprising the steps of: defining a cell region and a peripheral region in the substrate; forming a gate insulator over the substrate at each of the cell and peripheral regions of the substrate; forming a gate electrode on the gate insulator in each of the cell and peripheral regions; forming first impurity regions in the substrate at adjacent sides of the gate electrode at each of the cell and peripheral regions; forming a first insulating layer of a nitride on top and at sides of the gate electrode in each of the cell and peripheral regions; forming a photoresist layer on the first insulating layer and the substrate in the cell region; removing the first insulating layer at the peripheral region by selective etching using the photoresist as a mask to form nitride spacers on sides of the gate electrode in the cell region and a nitride cap over the gate electrode in the cell region; removing the photoresist layer at the cell region; forming an oxide layer over the gate electrode at the peripheral region and the first insulating layer at the cell region; removing the oxide layer at the peripheral region to expose a top portion of the gate electrode and forming gate sidewalls at the peripheral region; removing a portion of the oxide layer at the cell region, the amount of the oxide layer removed at the cell region being dependent on a width of the sidewalls at the peripheral region; and forming second impurity regions at the peripheral region using the oxide layer remaining at the cell region as a mask.
Claim 6
Independent Claim
277 words
A method for fabricating a semiconductor device having a substrate, the method comprising the steps of: defining a cell region and a peripheral region in the substrate; forming a gate insulator over the substrate at each of the cell and peripheral regions of the substrate; forming a gate electrode on the gate insulator in each of the cell and peripheral regions; forming first impurity regions in the substrate at adjacent sides of the gate electrode at each of the cell and peripheral regions; forming a first insulating layer of a nitride on top and at sides of the gate electrode in each of the cell and peripheral regions; forming a photoresist layer on the first insulating layer and the substrate in the cell region; removing the first insulating layer at the peripheral region by selective etching using the photoresist as a mask to form nitride spacers on sides of the gate electrode in the cell region and a nitride cap over the gate electrode in the cell region; removing the photoresist layer at the cell region; forming an oxide layer over the gate electrode at the peripheral region and the first insulating layer at the cell region; removing the oxide layer at the peripheral region to expose a top portion of the gate electrode and forming gate sidewalls at the peripheral region; removing a portion of the oxide layer at the cell region, the amount of the oxide layer removed at the cell region being dependent on a width of the sidewalls at the peripheral region; and forming second impurity regions at the peripheral region using the oxide layer remaining at the cell region as a mask.
Claim 7
Dependent Claim
35 words
The method as claimed in claim 4, wherein the steps of removing the oxide layer at the peripheral region and removing a portion of the oxide layer at the cell region are carried out simultaneously.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-02-22 | 2002-08-24 | 2003-02-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-02-22 | 2006-08-24 | 2007-02-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-02-22 | 2010-08-24 | 2011-02-23 | $7700.00 | Window Closed / Lapsed |