Patent JPS6245045B2 successfully refreshed from Google Patents.
US5869959A
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US
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Spectrum analyzer
Assignee: Advantest Corp
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Filing: 1992-09-01
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Granted: 1999-02-09
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Expires: 2012-09-01
Abstract
Abstract A spectrum analyzer includes a synchronizing signal input terminal (27A) and a sweep control signal generator (32) inserted between the synchronizing signal input terminal (27A) and a ramp address generator (23). In the case of making a frequency analysis of an input signal Sx which is a burst wave, a synchronizing signal SY, synchronized with the burst wave, is applied to the synchronizing signal input terminal (27A) from the outside and a sweep control signal SC which rises an arbitrary period of time after the synchronizing signal SY and has an arbitrary width is generated by the sweep control signal generator (32). The sweep control signal SC is applied to the ramp address generator (32), which sweeps, in each burst, a ramp voltage VR for controlling a local oscillator (16) and an address AD for effecting a write into a signal loading memory (19), and in the other periods the sweep is stopped.
Inventors
- 👤 Shigeo Tomikawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 14:04
CPC Classifications
G; G01; G01R; G01R23/00; G01R23/16; G01R23/173
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
243 words
A spectrum analyzer which comprises: local oscillator means for generating a frequency-sweepable local signal; frequency mixer means for frequency mixing said local signal and a signal to be measured to output an intermediate-frequency signal; detector means for detecting the amplitude of said intermediate-frequency signal; A-D converter means for converting the detected output of said detector means into a digital signal to output signal data; signal loading memory means for storing said signal data; ramp address generator means for supplying said local oscillator means with a sweep voltage for sweeping its oscillation frequency and said signal loading memory means with a sequence of sweep addresses for write use; display means for converting signal data read out of said signal loading memory means into an image signal and for displaying said image signal; and controller for effecting control to transfer said signal data from said signal loading memory means to said display means upon each completion of the address sweep of said ramp address generator means; which further includes: a synchronizing signal input terminal for inputting an external synchronizing signal synchronized with said signal to be measured in a frequency analysis mode; and sweep control signal generator means for generating a sweep control signal delayed for a desired period of time relative to the synchronizing signal input via said synchronizing signal input terminal, said sweep control signal being applied to said ramp address generator means to control the start and stop of its sweep operation.
Claim 2
Dependent Claim
243 words
A spectrum analyzer which comprises: local oscillator means for generating a frequency-sweepable local signal; frequency mixer means for frequency mixing said local signal and a signal to be measured to output an intermediate-frequency signal; detector means for detecting the amplitude of said intermediate-frequency signal; A-D converter means for converting the detected output of said detector means into a digital signal to output signal data; signal loading memory means for storing said signal data; ramp address generator means for supplying said local oscillator means with a sweep voltage for sweeping its oscillation frequency and said signal loading memory means with a sequence of sweep addresses for write use; display means for converting signal data read out of said signal loading memory means into an image signal and for displaying said image signal; and controller for effecting control to transfer said signal data from said signal loading memory means to said display means upon each completion of the address sweep of said ramp address generator means; which further includes: a synchronizing signal input terminal for inputting an external synchronizing signal synchronized with said signal to be measured in a frequency analysis mode; and sweep control signal generator means for generating a sweep control signal delayed for a desired period of time relative to the synchronizing signal input via said synchronizing signal input terminal, said sweep control signal being applied to said ramp address generator means to control the start and stop of its sweep operation.
Claim 3
Dependent Claim
94 words
The spectrum analyzer of claim 1, wherein said sweep control signal generator means includes: a rise control circuit for generating a first control signal a first period of time after said external synchronizing signal; a fall control circuit for generating a second control signal a second period of time after said external synchronizing signal, said second period of time being longer than said first period of time; and flip-flop means for generating said sweep control signal which responds to said first control signal to rise and responds to said second control signal to fall.
Claim 4
Dependent Claim
64 words
The spectrum analyzer of claim 2, which further includes select switching means for supplying a trigger signal provided thereto in a zero-span mode to said fall control circuit and wherein said second control signal provided from said fall control circuit in response to said trigger signal is applied as a delayed trigger signal to said ramp address generator means to start its sweep operation.
Claim 5
Dependent Claim
52 words
The spectrum analyzer of claim 1, which further includes variable delay means generating a delayed trigger signal by delaying, for an arbitrarily set period of time, a trigger signal provided thereto in a zero-span mode, said delayed trigger signal being applied to said ramp address generator means to start its sweep operation.
Claim 6
Dependent Claim
212 words
A spectrum analyzer which comprises: local oscillator means for generating a frequency-sweepable local signal; frequency mixer means for frequency mixing said local signal and a signal to be measured to output an intermediate-frequency signal; detector means for detecting the amplitude of said intermediate-frequency signal; A-D converter means for converting the detected output of said detector means into a digital signal to output signal data; signal loading memory means for storing said signal data; ramp address generator means for supplying said local oscillator means with a sweep voltage for sweeping its oscillation frequency and said signal loading memory means with a sequence of sweep addresses for write use; display means for converting signal data read out of said signal loading memory means into an image signal and for displaying said image signal; and controller for effecting control to transfer said signal data from said signal loading memory means to said display means upon each completion of the address sweep of said ramp address generator means; which further includes: variable delay means whereby, in a zero-span mode, a trigger signal provided thereto is delayed for an arbitrarily set period of time to generate a delayed trigger signal, said delayed trigger signal being applied to said ramp address generator means to start its sweep operation.
Claim 7
Dependent Claim
212 words
A spectrum analyzer which comprises: local oscillator means for generating a frequency-sweepable local signal; frequency mixer means for frequency mixing said local signal and a signal to be measured to output an intermediate-frequency signal; detector means for detecting the amplitude of said intermediate-frequency signal; A-D converter means for converting the detected output of said detector means into a digital signal to output signal data; signal loading memory means for storing said signal data; ramp address generator means for supplying said local oscillator means with a sweep voltage for sweeping its oscillation frequency and said signal loading memory means with a sequence of sweep addresses for write use; display means for converting signal data read out of said signal loading memory means into an image signal and for displaying said image signal; and controller for effecting control to transfer said signal data from said signal loading memory means to said display means upon each completion of the address sweep of said ramp address generator means; which further includes: variable delay means whereby, in a zero-span mode, a trigger signal provided thereto is delayed for an arbitrarily set period of time to generate a delayed trigger signal, said delayed trigger signal being applied to said ramp address generator means to start its sweep operation.
Claim 8
Dependent Claim
85 words
The spectrum analyzer of claim 1 or 5, which further includes: trigger signal generator means whereby an internal trigger signal synchronized with said signal to be measured is derived from the detected output of said detector means; an external trigger input terminal for inputting an external trigger signal; and select switching means for selecting either one of the output of said trigger signal generator means and said external trigger input terminal and for applying it as said trigger signal to said ramp address generator means.
Claim 9
Dependent Claim
198 words
The spectrum analyzer of claim 5, wherein said ramp address generator means includes: counter means for counting clock pulses and for supplying the count value as said sweep address to said signal loading memory means; detector means for detecting that said counter means has reached a preset value and for outputting a detected signal; counting control means which responds to the detected signal from said detector means to provide a trigger signal inhibit state and responds to a trigger enable signal to release said inhibit state and then responds to a trigger signal to supply said counter means with a counting control signal for starting its counting operation; and A-D converter means for converting said count value into an analog voltage and for outputting it as a ramp signal for controlling the oscillation frequency of said local oscillator; and wherein said sweep control signal is applied to an enable terminal of said counter means to control its counting enable state and said controller responds to said detected signal to effect control for transferring said signal data from said signal loading memory means to said display means and outputs said trigger enable signal after the completion of the transfer.
Claim 10
Dependent Claim
91 words
The spectrum analyzer of claim 5, wherein said variable delay means includes: flip-flop means which is reset by said delayed trigger signal into a trigger enable state and is triggered by the next trigger signal to output a counting enable signal; counter means which is put by said counting enable signal into a counting enable state and counts clock pulses; and detector means for detecting that the count value of said counter means has reached a value corresponding to said set period of time and for generating said delayed trigger signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-02-08 | 2002-08-10 | 2003-02-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-02-08 | 2006-08-10 | 2007-02-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-02-08 | 2010-08-10 | 2011-02-09 | $7700.00 | Window Closed / Lapsed |