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US5869375A Expired / Lapsed US ⏱️ 0.0 years remaining

Transistor fabrication method

Assignee: SK Hynix Inc
•
Filing: 1997-02-05
•
Granted: 1999-02-09
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Expires: 2017-02-05
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Abstract

Abstract A method for fabricating a transistor includes the steps of forming a gate insulation film on a substrate, forming a gate electrode on the gate insulation film and forming a first insulation film pattern on the gate electrode. A side wall spacer is formed at side surfaces of the first insulation film pattern and the gate electrode. The gate insulation film is etched to expose a portion of a surface of the substrate. An epitaxial layer is formed on the substrate where the gate insulation film is etched. The side wall spacer is removed and a thermal oxide film is grown on a portion corresponding to where the side wall spacer is removed and on an upper portion of the epitaxial layer. A source/drain region is formed by ion-implanting an impurity into the epitaxial layer.

Inventors

  • 👤 Jong-Moon Choi
  • 👤 Young Jin Song
  • 👤 Chang Reol Kim

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 23:08
CPC Classifications
H; H10; H10D; H10D12/00; H10D30/00; H10D30/60; H10D30/01; H10D30/021; H10D30/027; H10D30/0275

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 178 words
A method for fabricating a transistor, comprising the steps of: forming a gate insulation film on a substrate; forming a gate electrode of a refractory metal on the gate insulation film and forming a first insulation film pattern on the gate electrode; forming a side wall spacer at side surfaces of the first insulation film pattern and the gate electrode; etching the gate insulation film and exposing a portion of a surface of the substrate; forming an epitaxial layer on the substrate where the gate insulation film is etched; removing the side wall spacer; growing a thermal silicon oxide film on a portion corresponding to where the side wall spacer is removed and on an upper portion of the epitaxial layer by oxidizing the epitaxial layer; and forming source and drain regions by ion-implanting impurity ions into the epitaxial layer, wherein a channel is formed in the epitaxial layer between the substrate and one of the source and drain regions and also in a top surface of the substrate corresponding to a bottom surface of the gate electrode.
Claim 2
Independent Claim 178 words
A method for fabricating a transistor, comprising the steps of: forming a gate insulation film on a substrate; forming a gate electrode of a refractory metal on the gate insulation film and forming a first insulation film pattern on the gate electrode; forming a side wall spacer at side surfaces of the first insulation film pattern and the gate electrode; etching the gate insulation film and exposing a portion of a surface of the substrate; forming an epitaxial layer on the substrate where the gate insulation film is etched; removing the side wall spacer; growing a thermal silicon oxide film on a portion corresponding to where the side wall spacer is removed and on an upper portion of the epitaxial layer by oxidizing the epitaxial layer; and forming source and drain regions by ion-implanting impurity ions into the epitaxial layer, wherein a channel is formed in the epitaxial layer between the substrate and one of the source and drain regions and also in a top surface of the substrate corresponding to a bottom surface of the gate electrode.
Claim 3
Dependent Claim 17 words
The method according to claim 1, wherein the gate electrode formed of a refractory metal includes tungsten.
Claim 4
Dependent Claim 28 words
The method according to claim 1, further including the step of forming a lightly doped drain region within the epitaxial layer after growing the thermal silicon oxide film.
Claim 5
Dependent Claim 44 words
The method according to claim 1, wherein the step of forming the side wall spacer includes the steps of: forming a nitride film on surfaces of the gate insulation film, the first insulation film pattern, and the gate electrode; and etching-back the nitride film.
Claim 6
Dependent Claim 22 words
The method according to claim 1, wherein the removing step removes the side wall spacer using an H 3 PO 4 solution.
Claim 7
Dependent Claim 29 words
The method according to claim 1, wherein the step of etching the gate insulation film exposes the substrate surface at left and right sides of the side wall spacer.
Claim 8
Independent Claim 129 words
A method for fabricating a transistor comprising the steps of: forming a gate insulation film on a substrate; forming a gate electrode of a refractory metal on the gate insulation film and forming a first insulation film pattern on the gate electrode; forming a side wall spacer on side surfaces of the gate electrode and the first insulation film pattern and exposing a portion of a surface of the substrate; growing an epitaxial layer on the exposed substrate; and forming a source and drain by ion-implanting impurity ions into the epitaxial layer, wherein a channel is formed in the epitaxial layer between the substrate and one of the source and drain and also in a top surface of the substrate corresponding to a bottom surface of the gate electrode.
Claim 9
Independent Claim 129 words
A method for fabricating a transistor comprising the steps of: forming a gate insulation film on a substrate; forming a gate electrode of a refractory metal on the gate insulation film and forming a first insulation film pattern on the gate electrode; forming a side wall spacer on side surfaces of the gate electrode and the first insulation film pattern and exposing a portion of a surface of the substrate; growing an epitaxial layer on the exposed substrate; and forming a source and drain by ion-implanting impurity ions into the epitaxial layer, wherein a channel is formed in the epitaxial layer between the substrate and one of the source and drain and also in a top surface of the substrate corresponding to a bottom surface of the gate electrode.
Claim 10
Dependent Claim 17 words
The method according to claim 7, wherein the side wall spacer is formed with an oxide film.
Claim 11
Dependent Claim 17 words
The method according to claim 7, wherein the side wall spacer is formed with a dielectric film.
Claim 12
Dependent Claim 18 words
The method according to claim 9, wherein the dielectric film is formed with Ta 2 O 5 .
Claim 13
Dependent Claim 21 words
The method according to claim 7, further including the step of forming a lightly doped drain region within the epitaxial layer.
Claim 14
Dependent Claim 51 words
The method according to claim 7, wherein the step of forming the side wall spacer include the steps of: forming a second insulation film on surfaces of the gate insulation film, the first insulation film pattern, and the gate electrode; and etching-back the second insulation film and the gate insulation film.
Claim 15
Independent Claim 169 words
A method for fabricating a transistor, comprising the steps of: forming a gate insulation film on a substrate; forming a gate electrode on the gate insulation film and forming a first insulation film pattern on the gate electrode; forming a side wall spacer at side surfaces of the first insulation film pattern and the gate electrode; etching the gate insulation film and exposing a portion of a surface of the substrate; forming an epitaxial layer on the substrate where the gate insulation film is etched; removing the side wall spacer; growing a thermal oxide film on a portion corresponding to where the side wall spacer is removed and simultaneously on an upper portion of the epitaxial layer; and forming source and drain regions by ion-implanting impurity ions into the epitaxial layer, wherein a channel is formed in the epitaxial layer between the substrate and one of the source and drain regions and also in a top surface of the substrate corresponding to a bottom surface of the gate electrode.
Claim 16
Independent Claim 169 words
A method for fabricating a transistor, comprising the steps of: forming a gate insulation film on a substrate; forming a gate electrode on the gate insulation film and forming a first insulation film pattern on the gate electrode; forming a side wall spacer at side surfaces of the first insulation film pattern and the gate electrode; etching the gate insulation film and exposing a portion of a surface of the substrate; forming an epitaxial layer on the substrate where the gate insulation film is etched; removing the side wall spacer; growing a thermal oxide film on a portion corresponding to where the side wall spacer is removed and simultaneously on an upper portion of the epitaxial layer; and forming source and drain regions by ion-implanting impurity ions into the epitaxial layer, wherein a channel is formed in the epitaxial layer between the substrate and one of the source and drain regions and also in a top surface of the substrate corresponding to a bottom surface of the gate electrode.

References Cited (Backward Citations)

US5093275A Cited
US5430313A Cited
US5168072A Cited
US5270257A Cited
US5371026A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-02-08 2002-08-10 2003-02-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-02-08 2006-08-10 2007-02-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-02-08 2010-08-10 2011-02-09 $7700.00 Window Closed / Lapsed

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