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US5866948A Expired / Lapsed US ⏱️ 0.0 years remaining

Interposer for semiconductor device

Assignee: Hitachi Cable Ltd
•
Filing: 1996-07-18
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Granted: 1999-02-02
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Expires: 2016-07-18
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Abstract

Abstract A substrate 1 of a insulating resin material is provided with a semiconductor chip 2 in the center of the substrate 1 and a lot of fine studs are filled in the substrate 1 around the chip 2. A bonding pad 13 and a land 14 are formed on both end planes of each stud 12 by silver plating. The length of the stud 12 is determined so that the plane of the land 14 and the back side plane of the substrate are approximately co-planar, but it may be longer. The substrate 1 including the studs 12 having the bonding pad 12 and the land 14 is defined as an interposer 15.

Inventors

  • 👤 Gen Murakami
  • 👤 Mamoru Mita
  • 👤 Toyohiko Kumakura
  • 👤 Norio Okabe
  • 👤 Katsuji Komatsu
  • 👤 Shoji Shinzawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 14:35
CPC Classifications
H; H10; H10P; H10P72/00; H10P72/70; H10P72/74; H05; H05K; H05K3/00; H05K3/40; H05K3/4038; H10W; H10W70/00; H10W70/01; H10W70/05; H10W70/095; H10W70/60; H10W70/62; H10W70/63; H10W70/635; H10W72/00; H10W72/90; H10W90/00; H10W90/701; H05K2201/00; H05K2201/10; H05K2201/10227; H05K2201/10378; H05K2203/00; H05K2203/03; H05K2203/0369; H05K2203/07; H05K2203/0703; H05K2203/0733; H05K2203/14; H05K2203/1476; H05K3/02; H05K3/06; H10P72/7438; H10W70/65; H10W70/654; H10W70/655; H10W72/071; H10W72/075; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/5525; H10W72/59; H10W72/951; H10W72/952; H10W74/00; H10W90/751; H10W90/754

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 111 words
An interposer for a semiconductor device comprising: a substrate including: a surface side plane, a back side plane, a die pad disposed on said surface side plane for receiving a semiconductor chip, and a plurality of through holes positioned around said die pad; and a plurality of conductive studs disposed within said through holes for functioning as input-output terminals, each of said studs including a first side plane and a second side plane; said first side plane and said second side plane of each conductive stud being exposed from the surface side plane and back side plane of said substrate, respectively, for functioning as a bonding pad and a land, respectively.
Claim 2
Dependent Claim 111 words
An interposer for a semiconductor device comprising: a substrate including: a surface side plane, a back side plane, a die pad disposed on said surface side plane for receiving a semiconductor chip, and a plurality of through holes positioned around said die pad; and a plurality of conductive studs disposed within said through holes for functioning as input-output terminals, each of said studs including a first side plane and a second side plane; said first side plane and said second side plane of each conductive stud being exposed from the surface side plane and back side plane of said substrate, respectively, for functioning as a bonding pad and a land, respectively.
Claim 3
Dependent Claim 27 words
An interposer for a semiconductor device according to claim 1, wherein at least one side plane of each said plurality of conductive studs is plated for wirebonding.
Claim 4
Dependent Claim 31 words
An interposer for a semiconductor device, according to claim 1, wherein: said substrate is made of an insulating resin and said conductive stud is a fine wire molded in said substrate.
Claim 5
Dependent Claim 20 words
An interposer for a semiconductor device, according to claim 1, wherein each said plurality conductive stud is a nail-shaped stud.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-02-01 2002-08-03 2003-02-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-02-01 2006-08-03 2007-02-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-02-01 2010-08-03 2011-02-02 $7700.00 Window Closed / Lapsed

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