US5861864A
Expired / Lapsed
US
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Video interface system and method
Assignee: HP Inc
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Filing: 1996-04-02
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Granted: 1999-01-19
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Expires: 2016-04-02
Abstract
Abstract A video interface system and method produce an interlaced video signal from a noninterlaced graphics signal produced by a computer. The video interface system receives a digitized noninterlaced graphics signal directly from the graphics system of the computer and converts the graphics signal into an analog interlaced video signal. The noninterlaced graphics signal is characterized by a higher resolution and higher frequency than the analog interlaced video signal. In the preferred embodiment, the video interface is connected to a decoder within the graphics system. The decoder generates and combines timing signals with pixel values from a frame buffer to produce a noninterlaced graphics signal. In architecture, the video interface has an x-filter configured to receive the graphics signal and configured to scale an x-dimension of an image represented by the graphics signal, a y-filter connected to the x-filter for scaling a y-dimension of the image represented by the graphics signal, a cache connected to the y-filter for receiving data from the y-filter at a first rate and for providing the data to the y-filter, a field memory for receiving the data from the cache at a second rate that is slower than the first rate, and a video encoder for receiving data from the field memory at a third rate that is slower than the first and second rates and for providing the analog interlaced video signal.
Inventors
- 👤 Philip E. Jensen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 14:41
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/64; H04N9/641; G; G09; G09G; G09G5/00; G09G5/02; G09G5/04; G09G2310/00; G09G2310/02; G09G2310/0224; G09G5/36; G09G5/39; G09G5/391; H04N7/00; H04N7/01; H04N7/0117; H04N7/012
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
147 words
A system for producing an interlaced video signal from a noninterlaced graphics signal from a computer, comprising: a processor; a graphics system interconnected with said processor, said graphics system comprising: an accelerator configured to process primitives from said processor and produce pixel values; a frame buffer adapted to receive and store said pixel values from said accelerator; a decoder configured to generate and combine timing signals with said pixel values from said frame buffer to produce said noninterlaced graphics signal; a digital-to-analog converter configured to receive said graphics signal and produce a analog noninterlaced graphics signal for driving a computer graphics display, wherein a video interface is connected to said decoder for receiving said digital noninterlaced graphics signal therefrom; and said video interface configured to receive a digitized noninterlaced graphics signal from said graphics system and to convert said graphics signal into an analog interlaced video signal.
Claim 2
Independent Claim
147 words
A system for producing an interlaced video signal from a noninterlaced graphics signal from a computer, comprising: a processor; a graphics system interconnected with said processor, said graphics system comprising: an accelerator configured to process primitives from said processor and produce pixel values; a frame buffer adapted to receive and store said pixel values from said accelerator; a decoder configured to generate and combine timing signals with said pixel values from said frame buffer to produce said noninterlaced graphics signal; a digital-to-analog converter configured to receive said graphics signal and produce a analog noninterlaced graphics signal for driving a computer graphics display, wherein a video interface is connected to said decoder for receiving said digital noninterlaced graphics signal therefrom; and said video interface configured to receive a digitized noninterlaced graphics signal from said graphics system and to convert said graphics signal into an analog interlaced video signal.
Claim 3
Dependent Claim
25 words
The system of claim 1, wherein said noninterlaced graphics signal is characterized by a higher resolution and higher frequency than said analog interlaced video signal.
Claim 4
Dependent Claim
37 words
The system of claim 1, wherein said analog interlaced video signal has a pixel frequency of about 27 MHz and said noninterlaced graphics signal has a pixel frequency of a pixel clock associated with said graphics system.
Claim 5
Dependent Claim
21 words
The system of claim 1, wherein said analog interlaced video signal has a full image update rate of about 30 Hz.
Claim 6
Dependent Claim
21 words
The system of claim 1, wherein said analog interlaced video signal has a full image update rate of about 25 Hz.
Claim 7
Dependent Claim
60 words
The system of claim 1, further comprising an antiflicker filter associated with said video interface, said antiflicker filter configured to combine pixel values corresponding with successive horizontal lines in an image represented by said digitized noninterlaced graphics signal in order to create data for said interlaced video signal and modify said interlaced video signal to produce said image without flicker.
Claim 8
Independent Claim
179 words
A system for producing an interlaced video signal from a noninterlaced graphics signal from a computer, comprising: a processor; a graphics system interconnected with said processor; and a video interface configured to receive a digitized noninterlaced graphics signal from said graphics system and to convert said graphics signal into an analog interlaced video signal, wherein said video interface comprises: an x-filter configured to receive said graphics signal and configured to scale an x-dimension of an image represented by said graphics signal; a y-filter connected to said x-filter, said y-filter configured to scale a y-dimension of an image represented by said graphics signal; a cache connected to said y-filter, said cache for receiving data from said y-filter at a first rate and for providing data to said y-filter; a field memory for receiving data from said cache at a second rate that is slower than said first rate; and a video encoder for receiving data from said field memory at a third rate that is slower than said first and second rates and for providing said analog interlaced video signal.
Claim 9
Independent Claim
179 words
A system for producing an interlaced video signal from a noninterlaced graphics signal from a computer, comprising: a processor; a graphics system interconnected with said processor; and a video interface configured to receive a digitized noninterlaced graphics signal from said graphics system and to convert said graphics signal into an analog interlaced video signal, wherein said video interface comprises: an x-filter configured to receive said graphics signal and configured to scale an x-dimension of an image represented by said graphics signal; a y-filter connected to said x-filter, said y-filter configured to scale a y-dimension of an image represented by said graphics signal; a cache connected to said y-filter, said cache for receiving data from said y-filter at a first rate and for providing data to said y-filter; a field memory for receiving data from said cache at a second rate that is slower than said first rate; and a video encoder for receiving data from said field memory at a third rate that is slower than said first and second rates and for providing said analog interlaced video signal.
Claim 10
Dependent Claim
28 words
The system of claim 7, wherein said first rate is about 135 MHz, said second rate is about 45 MHz, and said third rate is about 27 MHz.
Claim 11
Dependent Claim
28 words
The system of claim 7, wherein said first rate is about 135 MHz, said second rate is about 45 MHz, and said third rate is about 25 MHz.
Claim 12
Independent Claim
104 words
A method for producing an analog interlaced video signal from a computer having a processor interconnected with a graphics system, comprising the steps of: receiving a noninterlaced graphics signal from the graphics system; storing said graphics signal at a first rate in a cache; transferring said graphics signal from said cache at a second rate that is slower than said first rate to a field memory; transferring said graphics signal from said field memory at a third rate that is slower than said first and second rates to produce a video signal; and converting said noninterlaced graphics signal into said analog interlaced video signal.
Claim 13
Independent Claim
104 words
A method for producing an analog interlaced video signal from a computer having a processor interconnected with a graphics system, comprising the steps of: receiving a noninterlaced graphics signal from the graphics system; storing said graphics signal at a first rate in a cache; transferring said graphics signal from said cache at a second rate that is slower than said first rate to a field memory; transferring said graphics signal from said field memory at a third rate that is slower than said first and second rates to produce a video signal; and converting said noninterlaced graphics signal into said analog interlaced video signal.
Claim 14
Dependent Claim
28 words
The method of claim 10, further comprising the step of utilizing said noninterlaced graphics signal with a higher resolution and higher frequency than said analog interlaced video signal.
Claim 15
Dependent Claim
50 words
The method of claim 10, wherein said graphics system comprises: processing primitives from said processor to produce pixel values; combining timing signals with said pixel values to produce said noninterlaced graphics signal; and producing a nonanalog interlaced graphics signal for driving a computer graphics display from said noninterlaced graphics signal.
Claim 16
Dependent Claim
35 words
The method of claim 10, further comprising the step of providing said analog interlaced video signal with a frequency of about 27 MHz and said noninterlaced graphics signal with a frequency of about 135 MHz.
Claim 17
Dependent Claim
26 words
The method of claim 10, further comprising the step of providing said analog interlaced video signal with a full image update rate of about 30 Hz.
Claim 18
Dependent Claim
26 words
The method of claim 10, further comprising the step of providing said analog interlaced video signal with a full image update rate of about 25 Hz.
Claim 19
Dependent Claim
21 words
The method of claim 10, further comprising the step of scaling an x-dimension of an image represented by said graphics signal.
Claim 20
Dependent Claim
21 words
The method of claim 10, further comprising the step of scaling a y-dimension of an image represented by said graphics signal.
Claim 21
Dependent Claim
42 words
The method of claim 10, further comprising the step of combining pixel values corresponding with successive horizontal lines in an image represented by said digitized noninterlaced graphics signal in order to modify said interlaced video signal to produce said image without flicker.
Claim 22
Dependent Claim
33 words
The method of claim 10, wherein said noninterlaced graphics signal is representative of successive image frames, and further comprising the step of producing said analog interlaced video signal from subset of said frames.
Claim 23
Dependent Claim
28 words
The method of claim 10, wherein said first rate is about 135 MHz, said second rate is about 45 MHz, and said third rate is about 27 MHz.
Claim 24
Dependent Claim
28 words
The method of claim 10, wherein said first rate is about 135 MHz, said second rate is about 45 MHz, and said third rate is about 25 MHz.
Claim 25
Dependent Claim
71 words
The method of claim 10, further comprising the steps of, when transferring said graphics signal from said field memory to produce said digital video signal: transferring odd and even lines alternately; and preventing transfer of odd and even lines from said cache to said field memory when odd and even lines are being transferred out from said field memory, respectively, by disregarding said odd and even lines from said cache, respectively.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-01-18 | 2002-07-20 | 2003-01-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-01-18 | 2006-07-20 | 2007-01-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-01-18 | 2010-07-20 | 2011-01-19 | $7700.00 | Window Closed / Lapsed |