Apparatus and method for automated testing of a progammable analog gain stage

Claim 2

A Built-In Self-Test circuit for testing an analog gain stage in a multiple-channel system, the Built-In Self-Test circuit comprising: a plurality of output voltage amplifiers; a plurality of programmable attenuator networks, ones of the plurality of programmable attenuator networks having an output terminal coupled to an input terminal of ones of the output voltage amplifiers; and a comparator having a plurality of input terminals, ones of the plurality of input terminals being coupled to output terminals of ones of the plurality of output voltage amplifiers so that the comparator mutually compares the operation of the plurality of output voltage amplifiers.

Claim 3

A Built-In Self-Test circuit according to claim 1, further comprising: a control circuit coupled to the plurality of programmable attenuator networks and coupled to the comparator, the control circuit including: an operation code for applying test voltages across ones of the plurality of programmable attenuator networks; an operation code for selecting an attenuation value for attenuating the test voltages; an operation code for controlling ones of the programmable attenuator network to attenuate the test voltages by the selected attenuation value; and an operation code for applying the attenuated test voltage to ones of the output voltage amplifier under test to generate an output voltage; and an operation code for mutually comparing the output voltages of selected ones of the plurality of output voltage amplifiers.

Claim 4

A Built-In Self-Test circuit for testing an analog gain stage in a multiple-channel system, the Built-In Self-Test circuit comprising: a first channel including: a first output voltage amplifier having an input terminal and an output terminal; and a first programmable attenuator network having an input terminal for receiving an input voltage, an input terminal for receiving a gain control signal, and an output terminal coupled to the input terminal of the first output voltage amplifier; a second channel including: a second output voltage amplifier having an input terminal and an output terminal; and a second programmable attenuator network having an input terminal for receiving an input voltage, an input terminal for receiving a gain control signal, and an output terminal coupled to the input terminal of the second output voltage amplifier; and a comparator having an input terminal coupled to the output terminal of the first output voltage amplifier and an input terminal coupled to the output terminal of the second output voltage amplifier so that the comparator mutually compares the operation of the first channel and the second channel.

Claim 5

A Built-In Self-Test circuit for testing an analog gain stage in a multiple-channel system, the Built-In Self-Test circuit comprising: a first channel including: a first output voltage amplifier having an input terminal and an output terminal; and a first programmable attenuator network having an input terminal for receiving an input voltage, an input terminal for receiving a gain control signal, and an output terminal coupled to the input terminal of the first output voltage amplifier; a second channel including: a second output voltage amplifier having an input terminal and an output terminal; and a second programmable attenuator network having an input terminal for receiving an input voltage, an input terminal for receiving a gain control signal, and an output terminal coupled to the input terminal of the second output voltage amplifier; and a comparator having an input terminal coupled to the output terminal of the first output voltage amplifier and an input terminal coupled to the output terminal of the second output voltage amplifier so that the comparator mutually compares the operation of the first channel and the second channel.

Claim 6

A Built-In Self-Test circuit according to claim 3, further comprising: a control circuit coupled to the first and second programmable attenuator networks and coupled to the comparator, the control circuit including: an operation code for applying test voltages across the first and second programmable attenuator networks; an operation code for selecting an attenuation value for attenuating the test voltages; an operation code for controlling ones of the first and second programmable attenuator networks to attenuate the test voltages by the selected attenuation value; and an operation code for applying the attenuated test voltages to the first and second output voltage amplifiers under test to generate an output voltage; and an operation code for mutually comparing the output voltages of the first and second output voltage amplifiers.

Claim 7

A Built-In Self-Test circuit for testing an analog gain stage in a multiple-channel system, the Built-In Self-Test circuit comprising: a first channel programmable attenuator network having a first input terminal for receiving a reference voltage, a second input terminal for receiving an input signal voltage, a control terminal for receiving a gain signal, and an output terminal coupled to an input terminal of a first channel output voltage amplifier; a first channel comparator having a first input terminal coupled to receive a signal selected from an output voltage of the first channel output voltage amplifier and the input signal voltage, a second input terminal coupled to receive a signal selected from an output voltage of a second channel output voltage amplifier and the reference voltage; a second channel programmable attenuator network having a first input terminal for receiving a reference voltage, a second input terminal for receiving an input signal voltage, a control terminal for receiving a gain signal, and an output terminal coupled to an input terminal of the second channel output voltage amplifier; and a second channel comparator having a first input terminal coupled to receive a signal selected from an output voltage of the second channel output voltage amplifier and the input signal voltage, a second input terminal coupled to receive a signal selected from an output voltage of the first channel output voltage amplifier and the reference voltage.

Claim 8

A Built-In Self-Test circuit for testing an analog gain stage in a multiple-channel system, the Built-In Self-Test circuit comprising: a first channel programmable attenuator network having a first input terminal for receiving a reference voltage, a second input terminal for receiving an input signal voltage, a control terminal for receiving a gain signal, and an output terminal coupled to an input terminal of a first channel output voltage amplifier; a first channel comparator having a first input terminal coupled to receive a signal selected from an output voltage of the first channel output voltage amplifier and the input signal voltage, a second input terminal coupled to receive a signal selected from an output voltage of a second channel output voltage amplifier and the reference voltage; a second channel programmable attenuator network having a first input terminal for receiving a reference voltage, a second input terminal for receiving an input signal voltage, a control terminal for receiving a gain signal, and an output terminal coupled to an input terminal of the second channel output voltage amplifier; and a second channel comparator having a first input terminal coupled to receive a signal selected from an output voltage of the second channel output voltage amplifier and the input signal voltage, a second input terminal coupled to receive a signal selected from an output voltage of the first channel output voltage amplifier and the reference voltage.

Claim 9

A Built-In Self-Test circuit according to claim 5, further comprising: an input switch circuit coupled to the first channel programmable attenuator network for alternatively coupling a voltage selected from a Built-In Self-Test voltage and the input voltage to the second input terminal of the first channel programmable attenuator network.

Claim 10

A Built-In Self-Test circuit according to claim 6, wherein the Built-In Self-Test voltage is a two-level voltage function selected from between the reference voltage plus a voltage corresponding to a full-scale gain and the reference voltage minus the voltage corresponding to the full-scale gain.

Claim 11

A Built-In Self-Test circuit according to claim 5, further comprising: a comparator switch circuit coupled to the second channel comparator for alternatively coupling a voltage selected from the output voltage of the first channel output voltage amplifier and the input signal voltage to the first input terminal and for alternatively coupling a voltage selected from the output voltage of the second channel output voltage amplifier and the reference voltage to the second input terminal.

Claim 12

A Built-In Self-Test circuit according to claim 5, further comprising: an attenuator decode circuit having a plurality of input lines for receiving a gain control signal and a plurality of output lines coupled to the control terminal of the first channel programmable attenuator network.

Claim 13

A Built-In Self-Test circuit according to claim 5, further comprising: a control circuit including an up/down counter and a state machine, the control circuit for selectively coupling voltages to the first input terminal and the second input terminal of the first channel comparator.

Claim 14

A Built-In Self-Test circuit according to claim 5, further comprising: a control circuit including an up/down counter and a state machine, the control circuit for determining a gain signal applied to the first channel programmable attenuator network.

Claim 17

A method according to claim 12 further comprising: testing the analog gain stage at die sort, while an integrated circuit die containing the analog gain stage is attached to a semiconductor wafer.

Claim 18

A method according to claim 12 further comprising: selecting the attenuation values in the first analog gain stage channel and the second analog gain stage channel to have different values; and applying a substantially identical input signal voltage to the programmable attenuator network of the first analog gain stage channel and the second analog gain stage channel.

Claim 19

A method according to claim 14 further comprising: comparing the output voltage of the first analog gain stage channel to the output voltage of the second analog gain stage channel using a first comparator; comparing the output voltage of the second analog gain stage channel to the output voltage of the first analog gain stage channel using a second comparator; and determining whether the first comparator and the second comparator consistently compare the output voltages.

Claim 20

A method according to claim 12 further comprising: controlling selection of the attenuation value and timing of the applying steps using a control block.

Claim 21

A method according to claim 16 further comprising the act of supplying the control block as a circuit in an integrated circuit die containing the analog gain stage.

Claim 22

A method according to claim 16 further comprising the act of supplying the control block from an external tester via test pins on an integrated circuit die containing the analog gain stage.

Claim 23

A method according to claim 12 further comprising: selecting the attenuation values in the first analog gain stage channel and the second analog gain stage channel to be numerically consecutive integer values; and applying an identical input signal voltage to the programmable attenuator network of the first analog gain stage channel and the second analog gain stage channel.

Claim 24

A method according to claim 12 further comprising: for the first analog gain stage channel and the second analog gain stage channel, selecting the input signal voltage for application across a programmable attenuator network.

Claim 25

A method according to claim 20 wherein the input signal voltage is selected as an input voltage minus a reference voltage.

Claim 28

A method according to claim 22 further comprising: providing an input switch circuit coupled to the first channel programmable attenuator network for alternatively coupling a voltage selected from a Built-In Self-Test voltage and the input voltage to the second input terminal of the first channel programmable attenuator network.

Claim 29

A method according to claim 22 further comprising: providing a comparator switch circuit coupled to the second channel comparator for alternatively coupling a voltage selected from the output voltage of the first channel analog gain stage and the input signal voltage to the first input terminal and for alternatively coupling a voltage selected from the output voltage of the second channel analog gain stage and the reference voltage to the second input terminal.

Claim 30

A method according to claim 22 further comprising: providing an attenuator decode circuit having a plurality of input lines for receiving a gain control signal and a plurality of output lines coupled to the control terminal of the first channel programmable attenuator network.

Claim 31

A method according to claim 22 further comprising: providing a control circuit including an up/down counter and a state machine, the control circuit for selectively coupling voltages to the first input terminal and the second input terminal of the first channel comparator.

Claim 32

A method according to claim 22 further comprising: providing a control circuit including an up/down counter and a state machine, the control circuit for determining a gain signal applied to the first channel programmable attenuator network.