Patent FR996626A successfully refreshed from Google Patents.
US5860144A
Expired / Lapsed
US
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Addressing method and system for providing access of a very large size physical memory buffer to a number of processes
Assignee: Oracle International Corp
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Filing: 1996-08-09
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Granted: 1999-01-12
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Expires: 2016-08-09
Abstract
Abstract An addressing method and system for accessing a very large size physical buffer by a number of processes. The novel system is applicable within a computer system having an n-bit computer operating system (e.g., where n is 16, 32, 64, etc.). The addressing method allocates a relatively small window of virtual address space, for each software process, which is used to access the very large physical buffer using a relatively small amount of operating system memory overhead. A page frame number (PFN) table of the system address space maintains a listing of physical memory pages used to define the very large physical buffer. The PFN table is used by each process to translate between a relative page number (RPN) and an address of a physical memory page containing the record. The virtual address space ("window") of each process is used to access the physical memory buffer and contains a hash table, a virtual access control block (VACB) free list, and a VACB table. Entries of the VACB table indicate addresses of virtual memory for the process. Each process also has an associated private page table entry (PTE) table which maintains a mapping between its virtual pages and the physical pages. To map a record, its RPN is determined and used to obtain the address of the physical page(s) in which the record resides. The free list supplies an entry of the VACB table containing a virtual address for the record. The virtual address and the physical address are mapped into the PTE table.
Inventors
- 👤 Richard Frank
- 👤 Gopalan Arun
- 👤 Richard Anderson
- 👤 Stephen Klein
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 16:23
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/10; G06F12/109; G06F12/1009
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
218 words
In a computer system having a processor coupled to a bus and a memory coupled to said bus, an addressing system for providing a process with access to a large physical memory space, said addressing system comprising: (a) a first table comprising a plurality of entries, each entry corresponding to a page of said physical memory space, said first table stored in said memory; (b) a virtual window associated with said process and representing a relatively small amount of virtual address space compared to said physical memory space, said virtual window comprising a control block table stored in said memory, said control block table comprising a plurality of control block entries, each control block entry representing a page of virtual memory within said virtual window; and (c) a page table entry data structure stored in said memory and corresponding to said process, said page table entry data structure comprising a plurality of entries, each entry for mapping a page of virtual memory of said process to a page of said physical memory space, wherein data records of said physical memory space are mapped into said virtual window of said process by associating, within said entries of said page table entry data structure, physical page addresses of said data records with vacant virtual page addresses of said virtual window.
Claim 2
Dependent Claim
218 words
In a computer system having a processor coupled to a bus and a memory coupled to said bus, an addressing system for providing a process with access to a large physical memory space, said addressing system comprising: (a) a first table comprising a plurality of entries, each entry corresponding to a page of said physical memory space, said first table stored in said memory; (b) a virtual window associated with said process and representing a relatively small amount of virtual address space compared to said physical memory space, said virtual window comprising a control block table stored in said memory, said control block table comprising a plurality of control block entries, each control block entry representing a page of virtual memory within said virtual window; and (c) a page table entry data structure stored in said memory and corresponding to said process, said page table entry data structure comprising a plurality of entries, each entry for mapping a page of virtual memory of said process to a page of said physical memory space, wherein data records of said physical memory space are mapped into said virtual window of said process by associating, within said entries of said page table entry data structure, physical page addresses of said data records with vacant virtual page addresses of said virtual window.
Claim 3
Dependent Claim
30 words
An addressing system as described in claim 1 wherein said process operates within a 32-bit operating system of said computer system and said large physical memory space is 64-bit addressable.
Claim 4
Dependent Claim
30 words
An addressing system as described in claim 1 wherein said process operates within a 64-bit operating system of said computer system and said large physical memory space is 64-bit addressable.
Claim 5
Dependent Claim
43 words
An addressing system as described in claim 1 wherein said large physical memory space is equal to or larger than 4 Gb in size and wherein said virtual address space is approximately on the order of between 1 and 2 Mb in size.
Claim 6
Dependent Claim
52 words
An addressing system as described in claim 1 wherein said virtual window further comprises: a control block free list indicating vacant entries within said control block table; and a hash table for maintaining a list of records mapped within said virtual window and their corresponding mapped entry within said control block table.
Claim 7
Dependent Claim
34 words
An addressing system as described in claim 5 wherein said virtual window further comprises a record number translator unit for translating record numbers into relative page numbers which represent entries within said first table.
Claim 8
Dependent Claim
38 words
An addressing system as described in claim 1 wherein each entry of said control block table represents a page of virtual address space within said virtual window for mapping a data record stored within said physical address space.
Claim 9
Dependent Claim
251 words
In a computer system having a processor coupled to a bus and a memory coupled to said bus, an addressing system for providing a plurality of processes with access to a large physical memory space of said memory, said addressing system comprising: (a) a first table comprising a plurality of entries, each entry corresponding to a page of said physical memory space; (b) a plurality of virtual windows each associated with a particular process of said plurality of processes and each representing a relatively small amount of virtual address space in relation to said physical memory space, each of said virtual windows comprising: (1) a control block table comprising a plurality of control block entries, each control block entry representing a page of virtual memory within said virtual window; and (2) a control block free list indicating vacant entries within said control block table; and (c) a plurality of page table entry data structures each associated with a particular process of said plurality of processes, each of said page table entry data structures comprising a plurality of entries, each entry for mapping a particular page of virtual memory of said page table entry data structure's particular process to a page of said physical memory space, and wherein data records of said physical memory space are mapped into said virtual windows of said process by associating, within said entries of said page table entry data structures, physical page addresses of said data records with vacant virtual page addresses of said virtual windows.
Claim 10
Dependent Claim
251 words
In a computer system having a processor coupled to a bus and a memory coupled to said bus, an addressing system for providing a plurality of processes with access to a large physical memory space of said memory, said addressing system comprising: (a) a first table comprising a plurality of entries, each entry corresponding to a page of said physical memory space; (b) a plurality of virtual windows each associated with a particular process of said plurality of processes and each representing a relatively small amount of virtual address space in relation to said physical memory space, each of said virtual windows comprising: (1) a control block table comprising a plurality of control block entries, each control block entry representing a page of virtual memory within said virtual window; and (2) a control block free list indicating vacant entries within said control block table; and (c) a plurality of page table entry data structures each associated with a particular process of said plurality of processes, each of said page table entry data structures comprising a plurality of entries, each entry for mapping a particular page of virtual memory of said page table entry data structure's particular process to a page of said physical memory space, and wherein data records of said physical memory space are mapped into said virtual windows of said process by associating, within said entries of said page table entry data structures, physical page addresses of said data records with vacant virtual page addresses of said virtual windows.
Claim 11
Dependent Claim
30 words
An addressing system as described in claim 8 wherein said process operates within a 32-bit operating system of said computer system and said large physical memory space is 64-bit addressable.
Claim 12
Dependent Claim
30 words
An addressing system as described in claim 8 wherein said process operates within a 64-bit operating system of said computer system and said large physical memory space is 64-bit addressable.
Claim 13
Dependent Claim
42 words
An addressing system as described in claim 8 wherein said large physical memory space is equal to or larger than 4 Gb in size and wherein said virtual address is approximately on the order of between 8 and 2 Mb in size.
Claim 14
Dependent Claim
40 words
An addressing system as described in claim 8 wherein each of said virtual windows further comprises a hash table for maintaining a list of records mapped within said virtual window and their corresponding mapped entry within said control block table.
Claim 15
Dependent Claim
36 words
An addressing system as described in claim 12 wherein each of said virtual windows further comprises a record number translator unit for translating record numbers into relative page numbers which represent entries within said first table.
Claim 16
Dependent Claim
43 words
An addressing system as described in claim 8 wherein each entry of said control block table of each virtual window represents a page of virtual address space within its associated virtual window for mapping a data record stored within said physical address space.
Claim 17
Dependent Claim
208 words
In a computer system having a processor coupled to a bus, a disk coupled to said bus, and a physical memory coupled to said bus, an addressing method for providing access of a very large physical memory space to a plurality of processes, said addressing method comprising the computer implemented steps of: generating a page table having a plurality of entries, each entry corresponding to at least one page within said large physical memory space, said plurality of entries defining a physical buffer; loading a set data records associated with a database application into said physical buffer; generating a plurality of virtual windows within said computer system, each of said virtual windows associated with a process of said plurality of n processes, each of said virtual windows providing its associated process with a virtual address space with which said associated process can access said physical buffer, said virtual address space being substantially smaller than said physical buffer; and mapping a particular data record of said physical buffer into a virtual address space associated with a particular virtual window of said plurality of virtual windows, said step of mapping providing a particular process associated with said particular virtual window with access to said data record within said physical buffer.
Claim 18
Dependent Claim
208 words
In a computer system having a processor coupled to a bus, a disk coupled to said bus, and a physical memory coupled to said bus, an addressing method for providing access of a very large physical memory space to a plurality of processes, said addressing method comprising the computer implemented steps of: generating a page table having a plurality of entries, each entry corresponding to at least one page within said large physical memory space, said plurality of entries defining a physical buffer; loading a set data records associated with a database application into said physical buffer; generating a plurality of virtual windows within said computer system, each of said virtual windows associated with a process of said plurality of n processes, each of said virtual windows providing its associated process with a virtual address space with which said associated process can access said physical buffer, said virtual address space being substantially smaller than said physical buffer; and mapping a particular data record of said physical buffer into a virtual address space associated with a particular virtual window of said plurality of virtual windows, said step of mapping providing a particular process associated with said particular virtual window with access to said data record within said physical buffer.
Claim 19
Dependent Claim
56 words
An addressing method as described in claim 15 further comprising the step of unmapping a particular mapped data record of said physical buffer from said virtual address space associated with said particular virtual window, said step of unmapping freeing an amount of virtual address space available to said particular process associated with said particular virtual window.
Claim 20
Dependent Claim
32 words
An addressing method as described in claim 15 wherein said plurality of processes operate within a 32-bit operating system of said computer system and said large physical memory space is 64-bit addressable.
Claim 21
Dependent Claim
44 words
An addressing method as described in claim 15 wherein said physical buffer is equal to or larger than 4 Gb in size and wherein each of said plurality of virtual windows is approximately on the order of between 1 and 2 Mb in size.
Claim 22
Dependent Claim
25 words
An addressing method as described in claim 15 wherein said step of loading comprises the step of loading said set data records from said disk.
Claim 23
Dependent Claim
91 words
An addressing method as described in claim 15 wherein said step of generating a plurality of virtual windows within said computer system comprises the steps of: generating a control block table for each of said plurality of virtual windows, said control block comprising a plurality of control block entries, each control block entry representing a page of virtual memory associated within a process; and generating a control block free list for each of said plurality of virtual windows, said control block free list indicating vacant entries within said control block table.
Claim 24
Dependent Claim
99 words
An addressing method as described in claim 20 wherein said step of generating a plurality of virtual windows within said computer system further comprises the steps of: generating a hash table for each of said plurality of virtual windows, said hash table for maintaining a list of data records mapped within said virtual window and their corresponding mapped entries within said control block table; and maintaining a record number translator unit for each of said plurality of virtual windows, said record number translator unit for translating record numbers into relative page numbers which represent entries within said first table.
Claim 25
Dependent Claim
229 words
A computer system comprising a processor coupled to a bus, a disk coupled to said bus, and a computer readable memory unit coupled to said bus, said computer readable memory unit containing a computer program of instructions for causing said computer system to implement an addressing method for providing access of a very large physical memory space to a plurality of n processes, said addressing method comprising the computer implemented steps of: generating a page table having a plurality of entries, each entry corresponding to at least one page within said large physical memory space, said plurality of entries defining a physical buffer; loading a set of data records associated with a database application into said physical buffer; generating a plurality of virtual windows within said computer system, each of said virtual windows associated with a process of said plurality of n processes, each of said virtual windows providing its associated process with a virtual address space with which said associated process can access said physical buffer, said virtual address space being substantially smaller than said physical buffer; and mapping a particular data record of said physical buffer into a virtual address space associated with a particular virtual window of said plurality of virtual windows, said step of mapping providing a particular process associated with said particular virtual window with access to said data record within said physical buffer.
Claim 26
Dependent Claim
229 words
A computer system comprising a processor coupled to a bus, a disk coupled to said bus, and a computer readable memory unit coupled to said bus, said computer readable memory unit containing a computer program of instructions for causing said computer system to implement an addressing method for providing access of a very large physical memory space to a plurality of n processes, said addressing method comprising the computer implemented steps of: generating a page table having a plurality of entries, each entry corresponding to at least one page within said large physical memory space, said plurality of entries defining a physical buffer; loading a set of data records associated with a database application into said physical buffer; generating a plurality of virtual windows within said computer system, each of said virtual windows associated with a process of said plurality of n processes, each of said virtual windows providing its associated process with a virtual address space with which said associated process can access said physical buffer, said virtual address space being substantially smaller than said physical buffer; and mapping a particular data record of said physical buffer into a virtual address space associated with a particular virtual window of said plurality of virtual windows, said step of mapping providing a particular process associated with said particular virtual window with access to said data record within said physical buffer.
Claim 27
Dependent Claim
56 words
A computer system as described in claim 22 further comprising the step of unmapping a particular mapped data record of said physical buffer from said virtual address space associated with said particular virtual window, said step of unmapping freeing an amount of virtual address space available to said particular process associated with said particular virtual window.
Claim 28
Dependent Claim
32 words
A computer system as described in claim 22 wherein said plurality of processes operate within a 32-bit operating system of said computer system and said large physical memory space is 64-bit addressable.
Claim 29
Dependent Claim
44 words
A computer system as described in claim 22 wherein said physical buffer is equal to or larger than 4 Gb in size and wherein each of said plurality of virtual windows is approximately on the order of between 1 and 2 Mb in size.
Claim 30
Dependent Claim
25 words
A computer system as described in claim 22 wherein said step of loading comprises the step of loading said set data records from said disk.
Claim 31
Dependent Claim
91 words
A computer system as described in claim 22 wherein said step of generating a plurality of virtual windows within said computer system comprises the steps of: generating a control block table for each of said plurality of virtual windows, said control block comprising a plurality of control block entries, each control block entry representing a page of virtual memory associated within a process; and generating a control block free list for each of said plurality of virtual windows, said control block free list indicating vacant entries within said control block table.
Claim 32
Dependent Claim
99 words
A computer system as described in claim 27 wherein said step of generating a plurality of virtual windows within said computer system further comprises the steps of: generating a hash table for each of said plurality of virtual windows, said hash table for maintaining a list of data records mapped within said virtual window and their corresponding mapped entries within said control block table; and maintaining a record number translator unit for each of said plurality of virtual windows, said record number translator unit for translating record numbers into relative page numbers which represent entries within said first table.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2002-01-11 | 2002-07-13 | 2003-01-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-01-11 | 2006-07-13 | 2007-01-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-01-11 | 2010-07-13 | 2011-01-12 | $7700.00 | Window Closed / Lapsed |