Reconstruction of BEMF signals for synchronizing the driving of brushless- sensorless motors by means of predefined driving signals

Claim 3

The method according to claim 1, further comprising the step of introducing a delay or anticipation of the zero-cross logic pulse as defined by an optimizer circuit.

Claim 4

The method according to claim 2, wherein the motor is driven in the voltage mode according to pre-defined voltage profiles stored in a static memory as a sequence of digital samples in the form of words of a certain number of bits, and scanned at a reading clock frequency variable as a function of the rotating speed of the motor and in which the difference between the scanned samples of the two phase windings of the motor is converted by a byte/PWM converter circuit into a PWM signal, the low and high levels of which are shifted by a pre-established scale factor.

Claim 5

The method according to claim 1, wherein the differential term of the reconstructing step is suppressed until the motor speed remains below a certain value.

Claim 8

The method according to claim 5, further comprising the step of introducing a delay or anticipation of the zero-cross logic pulse as defined by an optimizer circuit.

Claim 9

The method according to claim 5, wherein the differential term of the reconstructing step is suppressed until the motor speed remains below a certain value.

Claim 10

A circuit for reconstructing a BEMF signal induced on the phase windings of a motor driven with constant values or pre-defined profiles of current or voltage, the circuit comprising: a digital differentiator circuit having inputs for receiving pairs of bytes corresponding to the constant values or instantaneous samples of the pre-defined profiles of the drive signals of two distinct phase windings of the motor and an output for a byte representing a difference of the two input bytes; a byte/PWM converter circuit having an input connectable to the output of said digital differentiator circuit and an output for a PWM signal whose modulation corresponds to the value of the input byte difference; first and second sensing resistors in respective first and second phase windings of the two phase windings; an analog differential stage having differential inputs connected to the first sensing resistor and to the second sensing resistor, and an output for a difference signal of the currents flowing in the two phase windings; an analog differentiator having an input connected to the output of said analog differential stage; and a summing stage having three distinct inputs coupled to the respective outputs of said analog differential stage, said byte/PWM converter circuit and said analog differentiator, said summing stage having an output for a difference signal between a BEMF induced on the first phase winding and a BEMF induced on the second phase winding.

Claim 11

A circuit for reconstructing a BEMF signal induced on the phase windings of a motor driven with constant values or pre-defined profiles of current or voltage, the circuit comprising: a digital differentiator circuit having inputs for receiving pairs of bytes corresponding to the constant values or instantaneous samples of the pre-defined profiles of the drive signals of two distinct phase windings of the motor and an output for a byte representing a difference of the two input bytes; a byte/PWM converter circuit having an input connectable to the output of said digital differentiator circuit and an output for a PWM signal whose modulation corresponds to the value of the input byte difference; first and second sensing resistors in respective first and second phase windings of the two phase windings; an analog differential stage having differential inputs connected to the first sensing resistor and to the second sensing resistor, and an output for a difference signal of the currents flowing in the two phase windings; an analog differentiator having an input connected to the output of said analog differential stage; and a summing stage having three distinct inputs coupled to the respective outputs of said analog differential stage, said byte/PWM converter circuit and said analog differentiator, said summing stage having an output for a difference signal between a BEMF induced on the first phase winding and a BEMF induced on the second phase winding.

Claim 12

The circuit according to claim 8, wherein said analog differential stage, said analog differentiator and said byte/PWM converter circuit are provided with means for reducing an amplitude of the respective output signals by a factor N greater than one; and wherein said byte/PWM converter circuit comprises a level shifter for the PWM output signal.

Claim 13

The circuit according to claim 8, further comprising a control microprocessor; and wherein coupling between the input of said summing stage and the output of said analog differentiator is enabled by said control microprocessor when the speed of the motor exceeds a pre-established value.

Claim 14

The circuit according to claim 8, further comprising a low pass filter in cascade with the output of said summing stage for filtering PWM switching noise.

Claim 15

A driving system for a multiphase brushless-sensorless motor comprising: a memory storing at least a pre-defined driving profile of the phase windings of the motor; an amplitude modulating and reconstructing circuit for the distinct phase windings of the motor; a battery of byte/PWM converters for converting the current digital values of the pre-defined profiles for the different phase windings of the motor into as many PWM signals; a multiplexer for the PWM signals to be fed to a driving power stage of the phase windings of the motor; a regulating circuit of the motor speed rotation; a torque optimizer cooperating with said regulating circuit; a control of scanning frequency of said memory; circuit means for monitoring the current through two of the phase windings of the motor; and reconstructing circuit means for reconstructing at least a BEMF signal induced by the rotation of the rotor on the phase windings, for detecting the crossing from the reconstructed BEMF of a pre-defined level, and for generating a zero-cross pulse for synchronizing the scanning of the digital samples of said pre-defined driving profile.

Claim 16

A driving system for a multiphase brushless-sensorless motor comprising: a memory storing at least a pre-defined driving profile of the phase windings of the motor; an amplitude modulating and reconstructing circuit for the distinct phase windings of the motor; a battery of byte/PWM converters for converting the current digital values of the pre-defined profiles for the different phase windings of the motor into as many PWM signals; a multiplexer for the PWM signals to be fed to a driving power stage of the phase windings of the motor; a regulating circuit of the motor speed rotation; a torque optimizer cooperating with said regulating circuit; a control of scanning frequency of said memory; circuit means for monitoring the current through two of the phase windings of the motor; and reconstructing circuit means for reconstructing at least a BEMF signal induced by the rotation of the rotor on the phase windings, for detecting the crossing from the reconstructed BEMF of a pre-defined level, and for generating a zero-cross pulse for synchronizing the scanning of the digital samples of said pre-defined driving profile.

Claim 17

The driving system according to claim 12, wherein said reconstructing circuit means comprises: a byte/PWM converter circuit having an input connectable to the output of a digital differentiator circuit and an output for a PWM signal whose modulation corresponds to the value of the input byte difference; first and second sensing resistors in respective first and second phase windings of the two phase windings; an analog differential stage having differential inputs connected to the first sensing resistor and to the second sensing resistor, and an output for a difference signal of the currents flowing in the two phase windings; an analog differentiator having an input connected to the output of said analog differential stage; and a summing stage having three distinct inputs coupled to the respective outputs of said analog differential stage, said byte/PWM converter circuit and said analog differentiator, said summing stage having an output for a difference signal between a BEMF induced on the first phase winding and a BEMF induced on the second phase winding.

Claim 18

The driving system according to claim 13, wherein said analog differential stage, said analog differentiator and said byte/PWM converter circuit are provided with means for reducing an amplitude of the respective output signals by a factor N greater than one; and wherein said byte/PWM converter circuit comprises a level shifter for the PWM output signal.

Claim 19

The driving system according to claim 13, further comprising a control microprocessor; and wherein coupling between the input of said summing stage and the output of said analog differentiator is enabled by said control microprocessor when the speed of the motor exceeds a pre-established value.

Claim 20

The driving system according to claim 13, further comprising a low pass filter in cascade with the output of said summing stage for filtering PWM switching noise.