Abstract A variable rate Viterbi decoder comprising: a signal generating means for generating a control signal according to an input code rate and a sampling clock; a memory for storing punctured coded data; a memory control means in which a signal for recognizing valid data is inputted, and a read signal and a write signal are generated according to an input clock, the sampling clock, and the control signal from the signal generating means; a depuncturing means for depuncturing the punctured coded data from the memory according to the sampling clock and the control signal from the signal generating means; and a Viterbi decoding means for decoding the depunctured data from the depuncturing means according to the sampling clock and the control signal from the signal generating means.
A variable rate Viterbi decoder comprising: a) a signal generating means for generating a control signal according to an input code rate and a sampling clock; b) a memory for storing punctured coded data; c) a memory control means in which a signal for recognizing valid data is inputted, and a read signal and a write signal are generated according to an input clock, the sampling clock, and the control signal from said signal generating means; d) a depuncturing means for depuncturing the punctured coded data from said memory according to the sampling clock and the control signal from said signal generating means; and e) a Viterbi decoding means for decoding the depunctured data from said depuncturing means according to the sampling clock and the control signal from said signal generating means.
Claim 2
Dependent Claim
132 words
A variable rate Viterbi decoder comprising: a) a signal generating means for generating a control signal according to an input code rate and a sampling clock; b) a memory for storing punctured coded data; c) a memory control means in which a signal for recognizing valid data is inputted, and a read signal and a write signal are generated according to an input clock, the sampling clock, and the control signal from said signal generating means; d) a depuncturing means for depuncturing the punctured coded data from said memory according to the sampling clock and the control signal from said signal generating means; and e) a Viterbi decoding means for decoding the depunctured data from said depuncturing means according to the sampling clock and the control signal from said signal generating means.
Claim 3
Dependent Claim
81 words
The variable rate Viterbi decoder according to claim 1, wherein said signal generating means comprises a threshold value setting means for setting the numerator of the code rate as a threshold value when the code rate is recognized; a counter for generating a counting signal by counting the sampling clock according to the threshold value set in said threshold value setting means for setting a threshold value; and an enabling signal generating means according to the counting signal from said counter.
Claim 4
Dependent Claim
31 words
The variable rate Viterbi decoder according to claim 1, wherein said memory is embodied with a RAM of the First In First Out (FIFO) type to buffer input and output data.