US5815693A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Processor having a frequency modulated core clock based on the criticality of program activity
Assignee: Advanced Micro Devices Inc
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Filing: 1995-12-15
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Granted: 1998-09-29
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Expires: 2015-12-15
Abstract
Abstract A processing system includes a clock synchromesh that receives indicia of critical activity from various functional units within the processing system and responsive to the indicia, ratchets down/up the frequency of a clock output signal to at least one of the functional units to reduce power consumption. The determination of critical activity is preferably made according to a heuristic internal to a processor under software or hardware control.
Inventors
- 👤 Mark W. McDermott
- 👤 Antone L. Fourcroy
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 10:35
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/26; G06F1/32; G06F1/3203; G06F1/3234; G06F1/324; G06F1/04; G06F1/08; Y; Y02; Y02D; Y02D10/00
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
81 words
A processor with a CPU core having a frequency modulated clock input based on criticality of program activity comprising: (a) clock generation circuitry having at least one control input and at least one variable frequency clock output; and, (b) control circuitry, coupled to the at least one control input, to ratchet the frequency of the at least one variable frequency clock output up and down responsive to indicia of whether the CPU core has been operating in a repetitive program loop.
Claim 2
Dependent Claim
81 words
A processor with a CPU core having a frequency modulated clock input based on criticality of program activity comprising: (a) clock generation circuitry having at least one control input and at least one variable frequency clock output; and, (b) control circuitry, coupled to the at least one control input, to ratchet the frequency of the at least one variable frequency clock output up and down responsive to indicia of whether the CPU core has been operating in a repetitive program loop.
Claim 3
Dependent Claim
65 words
A processor with a CPU core having a frequency modulated clock input based on criticality of program activity comprising (a) means for generating at least one variable frequency clock output; and, (b) means for ratcheting the frequency of the at least one variable frequency clock output up and down responsive to indicia of whether the CPU core has been operating in a repetitive program loop.
Claim 4
Dependent Claim
65 words
A processor with a CPU core having a frequency modulated clock input based on criticality of program activity comprising (a) means for generating at least one variable frequency clock output; and, (b) means for ratcheting the frequency of the at least one variable frequency clock output up and down responsive to indicia of whether the CPU core has been operating in a repetitive program loop.
Claim 5
Independent Claim
60 words
A method of frequency modulating a clock input to a CPU core in a processor, comprising steps of: (a) generating at least one variable frequency clock output; and, (b) ratcheting the frequency of the at least one variable frequency clock output up and down responsive to indicia of whether the CPU core has been operating in a repetitive program loop.
Claim 6
Independent Claim
60 words
A method of frequency modulating a clock input to a CPU core in a processor, comprising steps of: (a) generating at least one variable frequency clock output; and, (b) ratcheting the frequency of the at least one variable frequency clock output up and down responsive to indicia of whether the CPU core has been operating in a repetitive program loop.
Claim 7
Dependent Claim
125 words
A computer system including a processor with a CPU core having a frequency modulated clock input based on criticality of program activity comprising: (a) a motherboard; (b) memory disposed on the motherboard; and, (c) a processor disposed on the motherboard coupled to the memory and including a CPU core and a clock generator having, (i) clock generation circuitry having at least one control input and at least one variable frequency clock output; and, (ii) control circuitry, coupled to the at least one control input, to ratchet the frequency of the at least one variable frequency clock output up and down responsive to indicia of whether the CPU core has been operating in a repetitive program loop without access to the memory disposed on the motherboard.
Claim 8
Dependent Claim
125 words
A computer system including a processor with a CPU core having a frequency modulated clock input based on criticality of program activity comprising: (a) a motherboard; (b) memory disposed on the motherboard; and, (c) a processor disposed on the motherboard coupled to the memory and including a CPU core and a clock generator having, (i) clock generation circuitry having at least one control input and at least one variable frequency clock output; and, (ii) control circuitry, coupled to the at least one control input, to ratchet the frequency of the at least one variable frequency clock output up and down responsive to indicia of whether the CPU core has been operating in a repetitive program loop without access to the memory disposed on the motherboard.
Claim 9
Dependent Claim
98 words
In a computer having a motherboard, a processor with a CPU core, and system memory external to the processor, a method of frequency modulating a clock input to the CPU core comprising steps of: (a) retrieving instructions from system memory; (b) executing the instructions with the processor; (c) generating at least one variable frequency clock output for use by the processor; and, (d) ratcheting the frequency of the at least one variable frequency clock output up and down responsive to indicia of whether the CPU core has been operating in a repetitive program loop without accessing system memory.
Claim 10
Dependent Claim
98 words
In a computer having a motherboard, a processor with a CPU core, and system memory external to the processor, a method of frequency modulating a clock input to the CPU core comprising steps of: (a) retrieving instructions from system memory; (b) executing the instructions with the processor; (c) generating at least one variable frequency clock output for use by the processor; and, (d) ratcheting the frequency of the at least one variable frequency clock output up and down responsive to indicia of whether the CPU core has been operating in a repetitive program loop without accessing system memory.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-09-28 | 2002-03-30 | 2002-09-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-09-28 | 2006-03-30 | 2006-09-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-09-28 | 2010-03-30 | 2010-09-29 | $7700.00 | Window Closed / Lapsed |