Sensor processor integrated circuit

Claim 1

A sensor processor formed of a single integrated circuit comprising a central processing unit (CPU), read only memory storing a program, an analog to digital converter for converting analog input data from a sensor to digital data, a digital filter for filtering said digital data in parallel with execution of program functions by said CPU, a plurality of filter parameter registers accessible by said filter and said CPU for storing filter parameter values to be used in filtering said digital data, and an output register accessible by said filter and said CPU for storing the result of a filter operation.

Claim 11

A system for controlling the deployment of an air bag installed on a motor vehicle, comprising: a vehicle acceleration sensor providing an analog output signal; sensor processor formed of a single integrated circuit including a central processing unit (CPU), read only memory storing a program, an analog to digital converter for converting analog input data from said sensor to digital data, said converter being initialized by said CPU and thereafter converting data without intervention by said CPU and providing storage of said data in a converter output register, a low pass infinite impulse response digital filter for filtering said digital data in parallel with execution of program functions by said CPU, a plurality of filter parameter registers accessible by said filter and said CPU for storing filter parameter values to be used in filtering said digital data, a filter output register accessible by said filter and said CPU for storing the result of a filter operation, said filter operation being of the form: y(n)= b.sub.0 x(n)+b.sub.1 x(n-1)+b.sub.2 x(n-2)-a.sub.1 y(n-1)-a.sub.2 y(n-2)!/a.sub.0 where x(n) is the most recently acquired sensor signal data input, x(n-1) is the previous sample, x(n-2) is two samples prior to the most recent. Y(n-1) and y(n-2) are the previous filter result and second previous result, respectively, and a 0 , a 1 , a 2 , b 0 , b 1 , b 0 are filter coefficients; a serial communication modulator for developing a modulated output; a programmable microcontroller responsive to said modulated output for controlling the deployment of said air bag.

Claim 12

A system for controlling the deployment of an air bag installed on a motor vehicle, comprising: a vehicle acceleration sensor providing an analog output signal; sensor processor formed of a single integrated circuit including a central processing unit (CPU), read only memory storing a program, an analog to digital converter for converting analog input data from said sensor to digital data, said converter being initialized by said CPU and thereafter converting data without intervention by said CPU and providing storage of said data in a converter output register, a low pass infinite impulse response digital filter for filtering said digital data in parallel with execution of program functions by said CPU, a plurality of filter parameter registers accessible by said filter and said CPU for storing filter parameter values to be used in filtering said digital data, a filter output register accessible by said filter and said CPU for storing the result of a filter operation, said filter operation being of the form: y(n)= b.sub.0 x(n)+b.sub.1 x(n-1)+b.sub.2 x(n-2)-a.sub.1 y(n-1)-a.sub.2 y(n-2)!/a.sub.0 where x(n) is the most recently acquired sensor signal data input, x(n-1) is the previous sample, x(n-2) is two samples prior to the most recent. Y(n-1) and y(n-2) are the previous filter result and second previous result, respectively, and a 0 , a 1 , a 2 , b 0 , b 1 , b 0 are filter coefficients; a serial communication modulator for developing a modulated output; a programmable microcontroller responsive to said modulated output for controlling the deployment of said air bag.