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US5805220A Expired / Lapsed US ⏱️ 0.0 years remaining

System for transmitting a plurality of video programs simultaneously through a transmission channel

Assignee: US Philips Corp
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Filing: 1996-02-22
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Granted: 1998-09-08
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Expires: 2016-02-22
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Abstract

Abstract System for transmitting n video programs simultaneously through a transmission channel having a predetermined bitrate, comprising in cascade a decoding assembly and an encoding assembly. The decoding assembly consists of n parallel decoding means provided in parallel for decoding the coded input signals corresponding to said programs, and the encoding assembly consists of n encoding means being in cascade with each of said decoding means and each comprising a quantizer having a variable step size and a variable length encoder. The system also comprises means for controlling the step sizes of said encoding means in dependence upon their respective output bitrates, and these control means are also provided for controlling the output bitrates of said encoding means in dependence upon complexity values associated to the coded input signals of each decoding means with respect to the joint complexity of the plurality of said coded signals.

Inventors

  • 👤 Gerrit J. Keesman
  • 👤 Petrus J. Van Otterloo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 17:58
CPC Classifications
H; H04; H04N; H04N19/00; H04N19/40; H04N19/10; H04N19/102; H04N19/115; H04N19/124; H04N19/134; H04N19/136; H04N19/14; H04N19/169; H04N19/184; H04N19/60; H04N19/61; H04N21/00; H04N21/20; H04N21/23; H04N21/236; H04N21/2365; H04N21/23655; H04N19/146; H04N19/152

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 188 words
A system for transmitting a plurality of video programs simultaneously through a transmission channel having a predetermined total bitrate, comprising: (a) in cascade a decoding assembly and an encoding assembly, said decoding assembly consisting of an identical plurality of decoding means provided in parallel for decoding n coded input signals corresponding to said programs and each comprising in cascade a demultiplexing circuit and a decoder, and said encoding assembly consisting of an identical plurality of encoding means being in cascade with said decoding means and each comprising in series a quantizer having a controllable step size and a variable length encoder; (b) means for combining the output bitstreams of said encoding means to an output channel bitstream; (c) control means for controlling respective step sizes of said plurality of encoding means in dependence upon the respective output bitrates of said encoding means; characterized in that: said control means are also provided for controlling the output bitrates of said encoding means in dependance upon complexity values associated to the coded input signals of each decoding means with respect to the joint complexity of the plurality of said coded signals.
Claim 2
Independent Claim 188 words
A system for transmitting a plurality of video programs simultaneously through a transmission channel having a predetermined total bitrate, comprising: (a) in cascade a decoding assembly and an encoding assembly, said decoding assembly consisting of an identical plurality of decoding means provided in parallel for decoding n coded input signals corresponding to said programs and each comprising in cascade a demultiplexing circuit and a decoder, and said encoding assembly consisting of an identical plurality of encoding means being in cascade with said decoding means and each comprising in series a quantizer having a controllable step size and a variable length encoder; (b) means for combining the output bitstreams of said encoding means to an output channel bitstream; (c) control means for controlling respective step sizes of said plurality of encoding means in dependence upon the respective output bitrates of said encoding means; characterized in that: said control means are also provided for controlling the output bitrates of said encoding means in dependance upon complexity values associated to the coded input signals of each decoding means with respect to the joint complexity of the plurality of said coded signals.
Claim 3
Dependent Claim 144 words
A system as claimed in claim 1, each picture of said video programs being, according to the MPEG standard, an intraframe coded or a predictively coded or a bidirectionally predictive coded picture, characterized in that it comprises a common bitrate adjusting circuit for applying a respective bitrate target value to each of the control means in dependence upon the complexities of the corresponding video programs, said adjusting circuit comprising computing means for gathering bitstreams and quantization parameters available in said input bitstreams and determining said complexities, a summing device for adding these complexities, dividers of each complexity by their sum, and multipliers of the obtained ratios by the channel bitrate computed for each of said three types of picture in said computing means, the respective outputs of said multipliers being the target values sent to said control means of each of said encoding means.
Claim 4
Dependent Claim 158 words
A system as claimed in claim 1, each picture of said video programs being, according to the MPEG standard, an intraframe coded or a predictively coded or a bidirectionally predictive coded picture, characterized in that it comprises a common bitrate adjusting circuit for applying a respective bitrate target value to each of the control means in dependence upon the complexities of the corresponding video programs, said adjusting circuit comprising computing means for gathering bitstreams and quantization parameters available at the outputs of said demultiplexing circuits and of said decoding devices and determining the complexity of each of said decoded signals, a summing device for adding these complexities, dividers of each complexity by their sum, and multipliers of the obtained ratios by the channel bitrate computed for each of said three types of picture in said computing means, the respective outputs of said multipliers being the target values sent to said control means of each of said encoding means.

References Cited (Backward Citations)

US5115309A Cited
US5627825A Cited
US5625416A Cited
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US5606369A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-09-07 2002-03-09 2002-09-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-09-07 2006-03-09 2006-09-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-09-07 2010-03-09 2010-09-08 $7700.00 Window Closed / Lapsed

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