US5801400A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Active matrix device
Assignee: Victor Company of Japan Ltd
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Filing: 1996-01-11
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Granted: 1998-09-01
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Expires: 2016-01-11
Abstract
Abstract An active matrix device has switching transistors arranged into a matrix pattern on a semiconductor substrate of a first conductivity type. Data is supplied, via signal lines, to sources of the transistors. Turn-on and -off operation of the of the transistors are controlled via gate lines. Pixel electrodes are connected to drains of the transistors. The active matrix device also has semiconductor regions of a second conductivity type opposite to the first conductivity type. The semiconductor regions are formed on the semiconductor substrate so that the semiconductor regions are separated from each other by portions of the semiconductor substrate. The transistors are formed in the semiconductor regions. The semiconductor substrate and the semiconductor regions are reverse-biased with respect to each other.
Inventors
- 👤 Toshihiko Nishihata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 04:52
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/18; G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/136277
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
114 words
An active matrix device comprising: a plurality of switching transistors arranged into a matrix pattern on a semiconductor substrate of a first conductivity type; signal lines for supplying data to sources of the transistors; gate lines for controlling turn on and turn off operation of the transistors; pixel electrodes connected to drains of the transistors; and semiconductor regions of a second conductivity type opposite to the first conductivity type, formed into wells in the semiconductor substrate so that the semiconductor regions are separated from each other by portions of the semiconductor substrate, the transistors being formed in the semiconductor regions, the semiconductor substrate and the semiconductor regions being reversed-biased with respect to each other.
Claim 2
Dependent Claim
114 words
An active matrix device comprising: a plurality of switching transistors arranged into a matrix pattern on a semiconductor substrate of a first conductivity type; signal lines for supplying data to sources of the transistors; gate lines for controlling turn on and turn off operation of the transistors; pixel electrodes connected to drains of the transistors; and semiconductor regions of a second conductivity type opposite to the first conductivity type, formed into wells in the semiconductor substrate so that the semiconductor regions are separated from each other by portions of the semiconductor substrate, the transistors being formed in the semiconductor regions, the semiconductor substrate and the semiconductor regions being reversed-biased with respect to each other.
Claim 3
Dependent Claim
47 words
The device of claim 1, further comprising an auxiliary capacitance electrode formed at least on each portion of the semiconductor substrate, via an insulating film, the auxiliary capacitance electrode being electrically connected to each pixel electrode and forming capacitance between the auxiliary electrode and the semiconductor substrate.
Claim 4
Dependent Claim
52 words
The device of claim 1, further comprising a drive circuit for driving the active matrix device, formed on the semiconductor substrate, the drive circuit being formed in a part of the semiconductor regions, the part of the semiconductor regions being electrically isolated from the semiconductor regions in which the transistors are formed.
Claim 5
Dependent Claim
39 words
The device of claim 3, further comprising a level shift circuit for converting signal levels of the driving circuit to signal levels of the transistors, the level shift circuit being formed between the drive circuit section and the transistors.
Claim 6
Dependent Claim
66 words
The device of claim 1, further comprising: an electro-optical section connected to the pixel electrodes; and an auxiliary electrode connected to the electro-optical section, for applying electric fields to the electro-optical section, wherein the semiconductor substrate is biased at potential that varies periodically and is reverse-biased with respect to the semiconductor regions, and phase of the varying potential period is in phase with the auxiliary electrode.
References Cited (Backward Citations)
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JPS5720778A
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JPS5727065A
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JPS6066470A
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JPH02922A
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US5245452A
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JPH03135597A
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JPH03288474A
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JPH05241199A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-08-31 | 2002-03-02 | 2002-09-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-08-31 | 2006-03-02 | 2006-09-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-08-31 | 2010-03-02 | 2010-09-01 | $7700.00 | Window Closed / Lapsed |