← Back to Patent Explorer
US5801069A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating thin film piezoelectric device

Assignee: Mitsubishi Electric Corp
•
Filing: 1996-01-31
•
Granted: 1998-09-01
•
Expires: 2016-01-31
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method of fabricating a thin film piezoelectric device includes preparing a semiconductor substrate having a surface; forming an etch stopping layer having an etching rate on the surface of the semiconductor substrate; forming a first semiconductor layer having an etching rate higher than the etching rate of the etch stopping layer on the etch stopping layer; forming a first electrode on a region of the first semiconductor layer; forming a piezoelectric film on the first electrode; forming a second electrode on the piezoelectric film; and etching a portion of the first semiconductor layer where the first electrode, the piezoelectric film, and the second electrode overlap, from the surface of the first semiconductor layer, selectively with respect to the etch stopping layer, thereby forming a cavity in the first semiconductor layer. Even when a compound semiconductor is employed as the substrate, the etching forming a cavity is stopped at the etch stopping layer in the direction perpendicular to the surface of the first semiconductor layer so that a cavity having a uniform depth is produced with high controllability.

Inventors

  • 👤 Kenichi Harada
  • 👤 Takeshi Kuragaki
  • 👤 Osamu Ishihara
  • 👤 Kazuhiko Sato
  • 👤 Akiyoshi Kudo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 21:36
CPC Classifications
H; H03; H03H; H03H3/00; H03H3/007; H03H3/02; H03H9/00; H03H9/15; H03H9/17; H03H9/171; H03H9/172; H03H9/173; H03H9/174; H03H2003/021; H03H2003/023

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 133 words
A method of fabricating a thin film piezoelectric device comprising: preparing a semiconductor substrate having a surface; forming an etch stopping layer having an etching rate on the surface of the semiconductor substrate; forming a first semiconductor layer having an etching rate higher than the etching rate of the etch stopping layer on the etch stopping layer; forming a first electrode on a region of the first semiconductor layer; forming a piezoelectric film on the first electrode; forming a second electrode on the piezoelectric film; and etching a portion of the first semiconductor layer opposite where the first electrode, the piezoelectric film, and the second electrode overlap, from the surface of the first semiconductor layer and selectively with respect to the etch stopping layer, thereby forming a cavity in the first semiconductor layer.
Claim 2
Independent Claim 133 words
A method of fabricating a thin film piezoelectric device comprising: preparing a semiconductor substrate having a surface; forming an etch stopping layer having an etching rate on the surface of the semiconductor substrate; forming a first semiconductor layer having an etching rate higher than the etching rate of the etch stopping layer on the etch stopping layer; forming a first electrode on a region of the first semiconductor layer; forming a piezoelectric film on the first electrode; forming a second electrode on the piezoelectric film; and etching a portion of the first semiconductor layer opposite where the first electrode, the piezoelectric film, and the second electrode overlap, from the surface of the first semiconductor layer and selectively with respect to the etch stopping layer, thereby forming a cavity in the first semiconductor layer.
Claim 3
Dependent Claim 53 words
The method of claim 1 further including: after formation of the first semiconductor layer, forming an insulating film on the first semiconductor layer; forming openings in the insulating film at regions adjacent to the first electrode; and etching the first semiconductor layer from the surface exposed in the openings in the insulating film.

References Cited (Backward Citations)

JPS6092672A Cited
US5493470A Cited
JPH03167913A Cited
JPH04192473A Cited
US5202281A Cited
US5395802A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-08-31 2002-03-02 2002-09-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-08-31 2006-03-02 2006-09-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-08-31 2010-03-02 2010-09-01 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag