US5789983A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High-frequency amplifier having variable gain in response to input power level
Assignee: NEC Electronics Corp
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Filing: 1996-02-21
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Granted: 1998-08-04
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Expires: 2016-02-21
Abstract
Abstract A semiconductor amplifier such as a high-frequency amplifier has a barrier-gate transistor FETQ1 and a circuit connected to the gate of the barrier-gate transistor FETQ1 for controlling an amplification gain of the barrier-gate transistor FETQ1. In one embodiment, the circuit has a resistor RG1 being connected between a GND line and the gate of the barrier-gate transistor FETQ1 and a resistor RG2 being connected between the gate of the barrier-gate transistor FETQ1 and a VGG line for biassing the gate of barrier-gate transistor FETQ1.
Inventors
- 👤 Masanori Fujita
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 11:55
CPC Classifications
H; H03; H03G; H03G1/00; H03G1/0005; H03G1/0035; H03G1/007; H03F; H03F3/00; H03F3/189; H03F3/19; H03F3/193; H03F3/1935; H03F2200/00; H03F2200/372
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
103 words
A semiconductor circuit comprising: a barrier-gate transistor connected between a first voltage line and a second voltage line, a gate, of said barrier-gate transistor being connected to a first node; a circuit connected to said first node for controlling an amplification gain of said barrier-gate transistor in accordance with a signal power applied to said first node; said circuit comprising a biasing circuit for biasing said first node to a predetermined voltage which comprises a first resistance element connected between said first voltage line and said first node, and a second resistance element connected between said first node and a third voltage line.
Claim 2
Dependent Claim
103 words
A semiconductor circuit comprising: a barrier-gate transistor connected between a first voltage line and a second voltage line, a gate, of said barrier-gate transistor being connected to a first node; a circuit connected to said first node for controlling an amplification gain of said barrier-gate transistor in accordance with a signal power applied to said first node; said circuit comprising a biasing circuit for biasing said first node to a predetermined voltage which comprises a first resistance element connected between said first voltage line and said first node, and a second resistance element connected between said first node and a third voltage line.
Claim 3
Dependent Claim
210 words
A semiconductor circuit comprising: a first barrier-gate transistor connected between a first voltage line and a second voltage line and a gate of said first barrier-gate transistor being connected to a first node; a first circuit connected to said first node for controlling an amplification gain of said first barrier-gate transistor based on a signal power applying to said first node; a first capacitor connected between said first voltage line and a second node; a strip line connected between said second node and a third node; a second barrier-gate transistor connected between said first voltage line and said second voltage line, a gate of said second barrier-gate transistor being connected to said third node; a second circuit connected to said third node for controlling an amplification gain of said second barrier-gate transistor based on a signal power applied to said third node; wherein said first circuit comprises a first resistance element connected between said first node and a third voltage line a second resistance element connected between said first node and said second voltage line; and wherein said second circuit comprises a third resistance element connected between said third node and said third voltage line and a fourth resistance element connected between said third node and said second voltage line.
Claim 4
Dependent Claim
210 words
A semiconductor circuit comprising: a first barrier-gate transistor connected between a first voltage line and a second voltage line and a gate of said first barrier-gate transistor being connected to a first node; a first circuit connected to said first node for controlling an amplification gain of said first barrier-gate transistor based on a signal power applying to said first node; a first capacitor connected between said first voltage line and a second node; a strip line connected between said second node and a third node; a second barrier-gate transistor connected between said first voltage line and said second voltage line, a gate of said second barrier-gate transistor being connected to said third node; a second circuit connected to said third node for controlling an amplification gain of said second barrier-gate transistor based on a signal power applied to said third node; wherein said first circuit comprises a first resistance element connected between said first node and a third voltage line a second resistance element connected between said first node and said second voltage line; and wherein said second circuit comprises a third resistance element connected between said third node and said third voltage line and a fourth resistance element connected between said third node and said second voltage line.
Claim 5
Dependent Claim
28 words
The semiconductor circuit as claimed in claim 2 further comprising a second capacitor connected between said first node and an input terminal for supplying a high-frequency input signal.
Claim 6
Dependent Claim
22 words
The semiconductor circuit as claimed in claim 3 further comprising a third capacitor connected between said first voltage line and an-output terminal.
Claim 7
Dependent Claim
17 words
The semiconductor circuit claimed in claim 2, wherein said barrier gate transistor comprises a Schottky barrier-gate transistor.
Claim 8
Dependent Claim
19 words
The semiconductor circuit as claimed in claim 5 wherein said Schottky barrier-gate transistor comprises a GaAs Schottky barrier-gate transistor.
Claim 9
Dependent Claim
94 words
A mobile communication system having a high frequency amplifier which comprises: a barrier-gate transistor connected between a first voltage line and a second voltage line, a gate of said barrier-gate transistor being connected to a first node; a circuit connected to said first node for controlling an amplification gain of said barrier-gate transistor based on a signal power of said first node; said circuit comprising a first resistance element connected between said first voltage line and said first node and a second resistance element connected between said first node and a third voltage line.
Claim 10
Dependent Claim
94 words
A mobile communication system having a high frequency amplifier which comprises: a barrier-gate transistor connected between a first voltage line and a second voltage line, a gate of said barrier-gate transistor being connected to a first node; a circuit connected to said first node for controlling an amplification gain of said barrier-gate transistor based on a signal power of said first node; said circuit comprising a first resistance element connected between said first voltage line and said first node and a second resistance element connected between said first node and a third voltage line.
Claim 11
Dependent Claim
17 words
The system as claimed in claim 7 wherein said barrier gate transistor comprises a Schottky barrier-gate transistor.
Claim 12
Dependent Claim
19 words
The semiconductor circuit as claimed in claim 8 wherein said Schottky barrier-gate transistor comprises a GaAs Schottky barrier-gate transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-08-03 | 2002-02-02 | 2002-08-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-08-03 | 2006-02-02 | 2006-08-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-08-03 | 2010-02-02 | 2010-08-04 | $7700.00 | Window Closed / Lapsed |