US5785236A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Advanced copper interconnect system that is compatible with existing IC wire bonding technology
Assignee: GlobalFoundries Inc
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Filing: 1995-11-29
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Granted: 1998-07-28
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Expires: 2015-11-29
Abstract
Abstract A process is provided which enables electrical connection to be formed between gold and aluminum wires and copper interconnects. Conventional techniques for wire bonding are ineffective for bonding gold wires or aluminum wires to copper pads or copper interconnects. A process is provided to modify the copper pads so that conventional wire bonding techniques can be employed. In the process of the present invention an aluminum pad is formed over the copper interconnects. The metal wire is then bonded to the aluminum pad using conventional wire bonding techniques. No new hardware and/or technology is required for the metal wire bonding. No new technology is required to integrate the process of the invention into existing IC fabrication processes.
Inventors
- 👤 Robin W. Cheung
- 👤 Ming-Ren Lin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 20:02
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/435; H10W72/00; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/59; H10W72/90; H10W72/951; H10W72/952; H10W72/981; H10W72/983; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49204
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
135 words
A process for forming electrical connection between metal wires and metal interconnects which cannot otherwise be bonded to form electrical contact therebetween, said metal wires and said metal interconnects supported over an integrated circuit structure, said metal interconnects supported in an interlayer dielectric, said process comprising: (a) forming at least one of said metal interconnects within said interlayer dielectric; (b) depositing a layer of aluminum on said metal interconnects and said interlayer dielectric; (c) patterning and etching said layer of aluminum to form an aluminum pad; (d) depositing an insulating layer over said aluminum pad, said metal interconnects, and said interlayer dielectric; (e) patterning and etching said insulating layer to form a bonding pad opening in said insulating layer above said aluminum pad; and (f) bonding one of said metal wires to said aluminum pad.
Claim 2
Dependent Claim
135 words
A process for forming electrical connection between metal wires and metal interconnects which cannot otherwise be bonded to form electrical contact therebetween, said metal wires and said metal interconnects supported over an integrated circuit structure, said metal interconnects supported in an interlayer dielectric, said process comprising: (a) forming at least one of said metal interconnects within said interlayer dielectric; (b) depositing a layer of aluminum on said metal interconnects and said interlayer dielectric; (c) patterning and etching said layer of aluminum to form an aluminum pad; (d) depositing an insulating layer over said aluminum pad, said metal interconnects, and said interlayer dielectric; (e) patterning and etching said insulating layer to form a bonding pad opening in said insulating layer above said aluminum pad; and (f) bonding one of said metal wires to said aluminum pad.
Claim 3
Dependent Claim
12 words
The process of claim 1 wherein said metal interconnects comprise copper interconnects.
Claim 4
Dependent Claim
23 words
The process of claim 1 wherein said metal wires are selected from the group of wires consisting of gold wires and aluminum wires.
Claim 5
Dependent Claim
15 words
The process of claim 1 wherein said metal interconnects are supported in an interlayer dielectric.
Claim 6
Dependent Claim
24 words
The process of claim 4 wherein said interlayer dielectric comprise dielectrics selected from the group consisting of oxide, nitride, oxynitride, polymers, and spin-on glass.
Claim 7
Dependent Claim
30 words
The process of claim 5 wherein said interlayer dielectric comprise dielectrics selected from the group consisting of CVD oxide, silicon dioxide, fluorinated silicon dioxide, silicon nitride, silicon oxynitride, and benzocylobutene.
Claim 8
Dependent Claim
18 words
The process of claim 5 wherein said interlayer dielectric is deposited by chemical vapor deposition or spin-on techniques.
Claim 9
Dependent Claim
75 words
The process of claim 4 wherein said metal interconnects are formed in said interlayer dielectric by a process comprising: (a) depositing said interlayer dielectric; (b) patterning and etching said interlayer dielectric to form trenches therein; (c) blanket depositing a layer of metal over said interlayer dielectric to fill said trenches; and (d) polishing or etching said layer of metal at least down to said interlayer dielectric to remove said excess metal outside of said trenches.
Claim 10
Dependent Claim
60 words
The process of claim 1 wherein a second insulating layer is formed which surrounds said aluminum pad by a process comprising: (a) depositing said second insulating layer over said aluminum pad and said first insulating layer; and (b) patterning and etching said second insulating layer to form a bonding pad opening in said first insulating layer above said aluminum pad.
Claim 11
Dependent Claim
35 words
The process of claim 1 wherein said integrated circuit structure comprises said integrated circuit devices formed in a semiconductor substrate, said integrated circuit devices including doped regions in said semiconductor substrate separated by field oxide.
Claim 12
Dependent Claim
32 words
The process of claim 10 wherein said integrated circuit structure includes multilayer interconnects comprising multiple levels of metal interconnects, each level of said metal interconnects supported by a separate said interlayer dielectric.
Claim 13
Dependent Claim
134 words
A process for forming electrical connection between metal wires and metal interconnects which cannot otherwise be bonded to form electrical contact therebetween, said metal wires and said metal interconnects supported over an integrated circuit structure, said metal interconnects supported in an interlayer dielectric, said process comprising: (a) forming at least one of said metal interconnects within said interlayer dielectric; (b) depositing a first insulating layer on said metal interconnects and said interlayer dielectric; (c) patterning and etching said first insulating layer to form openings is said first insulating layer; (d) blanket depositing a layer of aluminum on said first insulating layer and said openings in said first insulating layer; (e) patterning and etching said layer of aluminum to form an aluminum pad; and (f) bonding one of said metal wires to said aluminum pad.
Claim 14
Dependent Claim
134 words
A process for forming electrical connection between metal wires and metal interconnects which cannot otherwise be bonded to form electrical contact therebetween, said metal wires and said metal interconnects supported over an integrated circuit structure, said metal interconnects supported in an interlayer dielectric, said process comprising: (a) forming at least one of said metal interconnects within said interlayer dielectric; (b) depositing a first insulating layer on said metal interconnects and said interlayer dielectric; (c) patterning and etching said first insulating layer to form openings is said first insulating layer; (d) blanket depositing a layer of aluminum on said first insulating layer and said openings in said first insulating layer; (e) patterning and etching said layer of aluminum to form an aluminum pad; and (f) bonding one of said metal wires to said aluminum pad.
Claim 15
Dependent Claim
60 words
The process of claim 12 wherein a second insulating layer is formed which surrounds said aluminum pad by a process comprising: (a) depositing said second insulating layer over said aluminum pad and said first insulating layer; and (b) patterning and etching said second insulating layer to form a bonding pad opening in said first insulating layer above said aluminum pad.
Claim 16
Dependent Claim
12 words
The process of claim 12 wherein said metal interconnects comprise copper interconnects.
Claim 17
Dependent Claim
23 words
The process of claim 12 wherein said metal wires are selected from the group of wires consisting of gold wires and aluminum wires.
Claim 18
Dependent Claim
15 words
The process of claim 12 wherein said metal interconnects are supported in an interlayer dielectric.
Claim 19
Dependent Claim
24 words
The process of claim 16 wherein said interlayer dielectric comprise dielectrics selected from the group consisting of oxide, nitride, oxynitride, polymers, and spin-on glass.
Claim 20
Dependent Claim
30 words
The process of claim 17 wherein said interlayer dielectric comprise dielectrics selected from the group consisting of CVD oxide, silicon dioxide, fluorinated silicon dioxide, silicon nitride, silicon oxynitride, and benzocylobutene.
Claim 21
Dependent Claim
18 words
The process of claim 17 wherein said interlayer dielectric is deposited by chemical vapor deposition or spin-on techniques.
Claim 22
Dependent Claim
75 words
The process of claim 16 wherein said metal interconnects are formed in said interlayer dielectric by a process comprising: (a) depositing said interlayer dielectric; (b) patterning and etching said interlayer dielectric to form trenches therein; (c) blanket depositing a layer of metal over said interlayer dielectric to fill said trenches; and (d) polishing or etching said layer of metal at least down to said interlayer dielectric to remove said excess metal outside of said trenches.
Claim 23
Dependent Claim
35 words
The process of claim 12 wherein said integrated circuit structure comprises said integrated circuit devices formed in a semiconductor substrate, said integrated circuit devices including doped regions in said semiconductor substrate separated by field oxide.
Claim 24
Dependent Claim
32 words
The process of claim 21 wherein said integrated circuit structure includes multilayer interconnects comprising multiple levels of metal interconnects, each level of said metal interconnects supported by a separate said interlayer dielectric.
References Cited (Backward Citations)
US4736236A
Cited
US4735662A
Cited
US5406120A
Cited
US5463250A
Cited
US5455195A
Cited
US5659201A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2001-07-27 | 2002-01-26 | 2002-07-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-07-27 | 2006-01-26 | 2006-07-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-07-27 | 2010-01-26 | 2010-07-28 | $7700.00 | Window Closed / Lapsed |