US5784572A
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Method and apparatus for compressing video and voice signals according to different standards
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1995-12-29
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Granted: 1998-07-21
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Expires: 2015-12-29
Abstract
Abstract Disclosed herein is a method and apparatus for compressing and decompressing audio and video signals. The audio and video signals can be compressed and decompressed according to different standards, such as MPEG-1 and MPEG-2. The audio and video signals can also be compressed and decompressed at different rates. Compression rates can be varied to fit the audio and video signals into a narrow transmission bandwidth, such as an RF transmission bandwidth.
Inventors
- 👤 Michael D. Rostoker
- 👤 John Daane
- 👤 Sandeep Jaggi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 13:42
CPC Classifications
G; G06; G06T; G06T9/00; G06T9/007; H; H04; H04N; H04N21/00; H04N21/20; H04N21/23; H04N21/233; H04N21/2335; H04N21/234; H04N21/2343; H04N21/236; H04N21/2368; H04N21/242; H04N21/25; H04N21/266; H04N21/2662; H04N21/60; H04N21/61; H04N21/6106; H04N21/6131; H04N21/65; H04N21/658; H04N21/6587
Claims Analysis
Total Claims: 30
Claim 1
Independent Claim
176 words
Apparatus for variably compressing first and second signals in order to contemporaneously fit both said first and said second signals in compressed form into an available band width with each compressed signal utilizing a corresponding portion of said available band width, the apparatus comprising; a first processor for processing the first signal; a second processor for processing the second signal; and computer memory for storing a plurality of instruction sets each corresponding to respective different compression algorithms; the first processor being programmed by a first instruction set which is selected from the plurality of instruction sets stored in the computer memory in order to compress said first signal to utilize a corresponding first portion of said available band width; the second processor being programmed by a second instruction set which is selected from the plurality of instruction sets stored in the computer memory in order to compress said second signal to substantially utilize a corresponding second portion of said available band width, which second portion is equal to said available band width minus said first portion.
Claim 2
Dependent Claim
176 words
Apparatus for variably compressing first and second signals in order to contemporaneously fit both said first and said second signals in compressed form into an available band width with each compressed signal utilizing a corresponding portion of said available band width, the apparatus comprising; a first processor for processing the first signal; a second processor for processing the second signal; and computer memory for storing a plurality of instruction sets each corresponding to respective different compression algorithms; the first processor being programmed by a first instruction set which is selected from the plurality of instruction sets stored in the computer memory in order to compress said first signal to utilize a corresponding first portion of said available band width; the second processor being programmed by a second instruction set which is selected from the plurality of instruction sets stored in the computer memory in order to compress said second signal to substantially utilize a corresponding second portion of said available band width, which second portion is equal to said available band width minus said first portion.
Claim 3
Dependent Claim
94 words
The apparatus of claim 1, wherein the computer memory includes first and second pluralities of memory devices, each memory device in the first plurality storing an instruction set for compressing the first signal, each memory device in the second plurality storing an instruction set for compressing the second signal; wherein the apparatus includes a first selector switch for selecting the first instruction set from a memory device in the first plurality; and wherein the apparatus includes a second selector switch for selecting the second instruction set from a memory device in the second plurality.
Claim 4
Dependent Claim
86 words
The apparatus of claim 1, further comprising: a memory device for storing a plurality of compression rates corresponding to the first signal; a user input for selecting a compression rate from the memory device for use by the first processor; and a control loop for generating a compression rate corresponding to the second signal, the compression rate corresponding to the second signal being used by the second processor; wherein the first and second processors compress the first and second signals according to the corresponding compression rates.
Claim 5
Dependent Claim
22 words
The apparatus of claim 3, wherein the first signal is an audio signal, and wherein the second signal is a video signal.
Claim 6
Dependent Claim
72 words
The apparatus of claim 1, further comprising: a memory device for storing a plurality of bandwidth sets, each bandwidth set including a first bandwidth for the first signal and a second bandwidth for the second signal; a user input for selecting a bandwidth set from the memory device; and a control loop for compressing the first and second signals to fit within the first and second bandwidths of the selected bandwidth set.
Claim 7
Dependent Claim
22 words
The apparatus of claim 5, wherein the first signal is an audio signal, and wherein the second signal is a video signal.
Claim 8
Dependent Claim
57 words
The apparatus of claim 1, wherein the first and second signals are compressed by the first and second processors, and wherein the apparatus further comprises: a formatter which generates packet headers for the compressed signals; and a transport processor which divides the compressed signals into packet data and which adds a packet header to each packet data.
Claim 9
Dependent Claim
48 words
The apparatus of claim 7, wherein the packet headers generated by the formatter include an identifier indicating whether a compression rate and type are stored in the first few bytes of packet data; and wherein the transport processor adds the compression rate and type to the packet data.
Claim 10
Dependent Claim
114 words
The apparatus of claim 1, wherein the first and second signals are compressed by the first and second processors, and wherein the apparatus further comprises: a first formatter which generates first packet headers for the first signal; a first transport processor which divides the first signal into first packet data and which adds a first packet header to each first packet data; a second formatter which generates second packet headers for the second signal; a second transport processor which divides the second signal into second packet data and which adds a second packet header to each second packet data; and a multiplexer for multiplexing together the outputs of the first and second transport processors.
Claim 11
Dependent Claim
94 words
The apparatus of claim 1, wherein the computer memory includes: first and second pluralities of memory devices, each memory device in the first plurality storing an instruction set for decompressing the first signal, each memory device in the second plurality storing an instruction set for decompressing the second signal; wherein the apparatus includes a first selector switch for selecting the first instruction set from a memory device in the first plurality; and wherein the apparatus includes a second selector switch for selecting the second instruction set from a memory device in the second plurality.
Claim 12
Dependent Claim
83 words
The apparatus of claim 10, wherein the first and second signals are decompressed by the first and second processors, and wherein the apparatus further comprises: a buffer; a latch; and an inverse transport processor, responsive to the first and second compressed signals, for sending packet data to the buffer and for sending compression rates to the latch; wherein the first and second processors access the packet data in the buffer and compression rates in the latch to decompress the first and second signals.
Claim 13
Dependent Claim
39 words
The apparatus of claim 11, wherein the first and second signals are audio and video signals, and wherein the apparatus further comprises means for synchronizing the audio and video signals after being outputted from the first and second processors.
Claim 14
Dependent Claim
263 words
Apparatus for compressing audio and video signals, comprising: a first plurality of memory devices which each store different audio compression instruction sets for compressing the audio signal; a first processor that is programmable to compress the audio signal, the first processor being programmed by a selected one audio compression instruction set stored in a selected one of the memory devices of the first plurality; an audio formatter for generating packet headers for the compressed audio signal; an audio transport processor for dividing the compressed audio signal into audio packet data and for adding an audio packet header to each audio packet data; a second plurality of memory devices which each store different video compression instruction sets for compressing the video signal; a second processor that is programmable to compress the video signal, the second processor being programmed by a selected one video compression instruction set stored in a selected one of the memory devices of the second plurality; a video formatter for generating video packet headers for the compressed video signal; a video transport processor for dividing the compressed video signal into video packet data and for adding a video packet header to each video packet data; a multiplexer for multiplexing together the outputs of the first and second transport processors; and a control loop for selecting one instruction set from said first plurality of memory devices and one instruction set from said second plurality of memory devices for respectively programming said first and said second processors in order to compress the audio and video signals to fit together within a predetermined bandwidth.
Claim 15
Dependent Claim
263 words
Apparatus for compressing audio and video signals, comprising: a first plurality of memory devices which each store different audio compression instruction sets for compressing the audio signal; a first processor that is programmable to compress the audio signal, the first processor being programmed by a selected one audio compression instruction set stored in a selected one of the memory devices of the first plurality; an audio formatter for generating packet headers for the compressed audio signal; an audio transport processor for dividing the compressed audio signal into audio packet data and for adding an audio packet header to each audio packet data; a second plurality of memory devices which each store different video compression instruction sets for compressing the video signal; a second processor that is programmable to compress the video signal, the second processor being programmed by a selected one video compression instruction set stored in a selected one of the memory devices of the second plurality; a video formatter for generating video packet headers for the compressed video signal; a video transport processor for dividing the compressed video signal into video packet data and for adding a video packet header to each video packet data; a multiplexer for multiplexing together the outputs of the first and second transport processors; and a control loop for selecting one instruction set from said first plurality of memory devices and one instruction set from said second plurality of memory devices for respectively programming said first and said second processors in order to compress the audio and video signals to fit together within a predetermined bandwidth.
Claim 16
Dependent Claim
109 words
The apparatus of claim 13, further comprising: an additional memory device for storing a plurality of different compression rates corresponding to the audio signal; and a user input for selecting an audio compression rate from the additional memory device; wherein the control loop determines a necessary video compression rate from the audio compression rate; and corresponding portion of said available band width which is utilized by the compressed audio signal, said control loop selecting an instruction set from said second plurality of memory devices to effect said necessary video compression; wherein the first and second processors compress the respective audio and video signals according to the corresponding compression rates.
Claim 17
Dependent Claim
49 words
The apparatus of claim 13, further comprising: an additional memory device for storing a plurality of bandwidth sets, each bandwidth set including a bandwidth for the audio signal and a bandwidth for the video signal; and a user input for selecting a bandwidth set from the additional memory device.
Claim 18
Dependent Claim
202 words
Apparatus for decompressing audio and video transport packets, each packet including a packet header and packet data, a packet header indicating whether the corresponding packet data includes a compression rate and type, the apparatus comprising: a buffer; a latch; a first plurality of memory devices which store different instruction sets for decompressing the audio packet data; a second plurality of memory devices which store different instruction sets for decompressing the video packet data; an inverse transport processor, responsive to the audio and video transport packets, for storing packet data in the buffer and for storing the compression rates and types in the latch; a first digital signal processor for decompressing the audio packet data stored in the buffer at the rate specified in the latch, the first digital signal processor being programmed to perform decompression by the instruction set stored in a selected one of the memory devices in the first group; and a second digital signal processor for decompressing the video packet data stored in the buffer at the rate specified in the latch, the second digital signal processor being programmed to perform decompression by the instruction set stored in a selected one of the memory devices in the second group.
Claim 19
Dependent Claim
202 words
Apparatus for decompressing audio and video transport packets, each packet including a packet header and packet data, a packet header indicating whether the corresponding packet data includes a compression rate and type, the apparatus comprising: a buffer; a latch; a first plurality of memory devices which store different instruction sets for decompressing the audio packet data; a second plurality of memory devices which store different instruction sets for decompressing the video packet data; an inverse transport processor, responsive to the audio and video transport packets, for storing packet data in the buffer and for storing the compression rates and types in the latch; a first digital signal processor for decompressing the audio packet data stored in the buffer at the rate specified in the latch, the first digital signal processor being programmed to perform decompression by the instruction set stored in a selected one of the memory devices in the first group; and a second digital signal processor for decompressing the video packet data stored in the buffer at the rate specified in the latch, the second digital signal processor being programmed to perform decompression by the instruction set stored in a selected one of the memory devices in the second group.
Claim 20
Dependent Claim
27 words
The apparatus of claim 16, wherein the memory devices of the first and second groups are selected in accordance with the compression types stored in the latch.
Claim 21
Independent Claim
104 words
A method for variably compressing and decompressing first and second signals in order to contemporaneously fit both the compressed first and second signals into an available band width , said method comprising steps of: storing in computer memory a plurality of instruction sets each corresponding to different algorithms for signal compression and decompression; selecting first and second instruction sets from the plurality of instruction sets in the computer memory; programming a first processor with the first selected instruction set to compress and decompress the first signal; and programming a second processor with the second selected instruction set to compress and decompress the second signal.
Claim 22
Independent Claim
104 words
A method for variably compressing and decompressing first and second signals in order to contemporaneously fit both the compressed first and second signals into an available band width , said method comprising steps of: storing in computer memory a plurality of instruction sets each corresponding to different algorithms for signal compression and decompression; selecting first and second instruction sets from the plurality of instruction sets in the computer memory; programming a first processor with the first selected instruction set to compress and decompress the first signal; and programming a second processor with the second selected instruction set to compress and decompress the second signal.
Claim 23
Dependent Claim
38 words
The method of claim 18, further comprising the step of varying the rates at which the audio and video signals are compressed, the rates being varied to keep the audio and video signals within a relatively constant bandwidth.
Claim 24
Dependent Claim
56 words
The method of claim 19, wherein the compression rates are varied by: storing in computer memory a plurality of compression rates corresponding to the first signal; selecting a compression rate for use by the first processor; and generating a compression rate for use by the second processor, the second rate being generated from the first rate.
Claim 25
Independent Claim
179 words
A method of compressing audio and video signals, comprising the steps of: storing in computer memory a first plurality of instruction sets for compressing the audio signal; selecting a first instruction set from the first plurality; programming a first processor with the selected first instruction set, the first processor being programmed to compress the audio signal; generating audio packet headers for the compressed audio signal; dividing the compressed audio signal into audio packet data; adding an audio packet header to each audio packet data to form audio transport packets; storing in computer memory a second plurality of instruction sets for compressing the video signal; selecting a second instruction set from the second plurality; programming a second processor with the selected second instruction set, the second processor being programmed to compress the video signal; generating video packet headers for the compressed video signal; dividing the compressed video signal into video packet data; adding a video packet header to each video packet data to form video transport packets; and multiplexing together the video and audio transport packets into a single stream.
Claim 26
Independent Claim
179 words
A method of compressing audio and video signals, comprising the steps of: storing in computer memory a first plurality of instruction sets for compressing the audio signal; selecting a first instruction set from the first plurality; programming a first processor with the selected first instruction set, the first processor being programmed to compress the audio signal; generating audio packet headers for the compressed audio signal; dividing the compressed audio signal into audio packet data; adding an audio packet header to each audio packet data to form audio transport packets; storing in computer memory a second plurality of instruction sets for compressing the video signal; selecting a second instruction set from the second plurality; programming a second processor with the selected second instruction set, the second processor being programmed to compress the video signal; generating video packet headers for the compressed video signal; dividing the compressed video signal into video packet data; adding a video packet header to each video packet data to form video transport packets; and multiplexing together the video and audio transport packets into a single stream.
Claim 27
Dependent Claim
56 words
The method of claim 21, further comprising the steps of: storing in computer memory a plurality of audio compression rates; selecting an audio compression rate from the first plurality; and generating a video compression rate from the selected audio compression rate; wherein the audio and video signals are compressed at the audio and video compression rates.
Claim 28
Dependent Claim
57 words
The method of claim 21, further comprising the steps of: storing in computer memory a plurality of audio and video bandwidths; selecting an audio bandwidth and a video bandwidth from the plurality of bandwidths; and generating audio and video compression rates from the selected bandwidths; wherein the audio and video signals are compressed at the generated rates.
Claim 29
Independent Claim
188 words
A method of decompressing audio and video transport packets, each packet including a packet header and packet data, a packet header indicating whether the corresponding packet data includes a compression rate and type, the method comprising the steps of: storing in computer memory a first plurality of instruction sets for decompressing the audio transport packets; selecting a first instruction set from the first plurality; storing in computer memory a second plurality of instruction sets for decompressing the video transport packets; selecting a second instruction set from the second plurality; storing audio packet data in one area of memory and video packet data in another area of memory; determining whether compression rate and type are included in the packet data; storing the compression rate and type in yet another area of memory; programming a first digital signal processor to decompress the audio packet data at the stored rate, the first digital signal processor being programmed with the first instruction set; and programming a second digital signal processor to decompress the video packet data at the stored rate, the second digital signal processor being programmed with the second instruction set.
Claim 30
Independent Claim
188 words
A method of decompressing audio and video transport packets, each packet including a packet header and packet data, a packet header indicating whether the corresponding packet data includes a compression rate and type, the method comprising the steps of: storing in computer memory a first plurality of instruction sets for decompressing the audio transport packets; selecting a first instruction set from the first plurality; storing in computer memory a second plurality of instruction sets for decompressing the video transport packets; selecting a second instruction set from the second plurality; storing audio packet data in one area of memory and video packet data in another area of memory; determining whether compression rate and type are included in the packet data; storing the compression rate and type in yet another area of memory; programming a first digital signal processor to decompress the audio packet data at the stored rate, the first digital signal processor being programmed with the first instruction set; and programming a second digital signal processor to decompress the video packet data at the stored rate, the second digital signal processor being programmed with the second instruction set.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-07-20 | 2002-01-19 | 2002-07-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-07-20 | 2006-01-19 | 2006-07-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-07-20 | 2010-01-19 | 2010-07-21 | $7700.00 | Window Closed / Lapsed |