US5784261A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Microchip module assemblies
Assignee: Microchip Technology Caldicot Ltd
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Filing: 1996-01-31
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Granted: 1998-07-21
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Expires: 2016-01-31
Abstract
Abstract Low profile microchip module assemblies are formed by first mounting one or more active semiconductor integrated circuit chips on a multilayer metallization and dielectric structure on a substrate of, say, silicon or alumina, by wire bonding or flip-chip solder bonding, and then inverting the substrate and mounting it on a printed circuit board by means of solder bump connections. The solder bump connections are sufficiently high for the chips to be held clear of the printed circuit board.
Inventors
- 👤 David Pedder
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 18:30
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/02; H05K1/14; H05K1/141; H10; H10W; H10W74/00; H10W74/01; H10W74/012; H10W74/10; H10W74/15; H05K2201/00; H05K2201/10; H05K2201/10431; H05K2201/10439; H05K2201/10477; H05K2201/10613; H05K2201/10954; H05K2201/10977; H05K3/00; H05K3/22; H05K3/28; H05K3/284; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3431; H05K3/3436; H05K3/36; H05K3/368; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236; H10W72/07251; H10W72/20; H10W72/251; H10W72/252; H10W72/851; H10W72/853; H10W72/856; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49146
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
211 words
A module on board structure, comprising: a) a microchip module assembly mounted on, and connected directly to, electrical conductors formed on a surface of a fine-line printed circuit board, the microchip module assembly including i) a substrate of electrically insulating material having formed on one major surface thereof a multilayer metallization and dielectric structure; ii) at least one active semiconductor device mounted on said one major surface of said substrate; iii) means electrically connecting said at least one active semiconductor device to at least one metallization layer on said one major surface of said substrate; and iv) a first filler layer of a heat conducting electrically insulating encapsulant material between said at least one active semiconductor device and said one major surface of said substrate; b) a plurality of solder bumps directly connecting conductors on said one major surface of said substrate to conductors on said surface of said printed circuit board, said solder bumps having a coefficient of thermal expansion; and c) a second filler layer of a heat conducting electrically insulating encapsulant material between said one major surface of said substrate and said printed circuit board, said encapsulant material of said second filler layer having a coefficient of thermal expansion substantially matched to said coefficient of said solder bumps.
Claim 2
Dependent Claim
211 words
A module on board structure, comprising: a) a microchip module assembly mounted on, and connected directly to, electrical conductors formed on a surface of a fine-line printed circuit board, the microchip module assembly including i) a substrate of electrically insulating material having formed on one major surface thereof a multilayer metallization and dielectric structure; ii) at least one active semiconductor device mounted on said one major surface of said substrate; iii) means electrically connecting said at least one active semiconductor device to at least one metallization layer on said one major surface of said substrate; and iv) a first filler layer of a heat conducting electrically insulating encapsulant material between said at least one active semiconductor device and said one major surface of said substrate; b) a plurality of solder bumps directly connecting conductors on said one major surface of said substrate to conductors on said surface of said printed circuit board, said solder bumps having a coefficient of thermal expansion; and c) a second filler layer of a heat conducting electrically insulating encapsulant material between said one major surface of said substrate and said printed circuit board, said encapsulant material of said second filler layer having a coefficient of thermal expansion substantially matched to said coefficient of said solder bumps.
Claim 3
Dependent Claim
79 words
The module on board structure in accordance with claim 1, wherein said at least one active semiconductor device is mounted on said one major surface of said substrate by a flip-chip solder bond that leaves spaces between said at least one active semiconductor device and said one major surface of said substrate, and wherein said encapsulant material of said first filler layer has a coefficient of thermal expansion substantially matching a coefficient of thermal expansion of said solder bond.
Claim 4
Dependent Claim
44 words
The module on board structure in accordance with claim 1, wherein said multilayer metallization and dielectric structure incorporates a ground plane metallization; and means, including some of said solder bumps, for connecting said ground plane metallization with screening structures on said printed circuit board.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-07-20 | 2002-01-19 | 2002-07-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-07-20 | 2006-01-19 | 2006-07-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-07-20 | 2010-01-19 | 2010-07-21 | $7700.00 | Window Closed / Lapsed |