US5779925A — Plasma processing with less damage

Claim 1

Independent Claim 94 words

A method of manufacturing a semiconductor device including a transistor having an insulated gate with use of plasma wherein at least one selected from the group consisting of rf frequency, power, magnetic field, pressure, and gas species is selected so that an electron energy distribution in a plasma has an electron temperature Te expressed in electron volts which is smaller than B, where B is a breakdown voltage of the insulated gate expressed in volts, thereby allowing electrons to enter a conductive pattern appearing between insulating patterns having an aspect ratio higher than 1.

Claim 2

Independent Claim 94 words

A method of manufacturing a semiconductor device including a transistor having an insulated gate with use of plasma wherein at least one selected from the group consisting of rf frequency, power, magnetic field, pressure, and gas species is selected so that an electron energy distribution in a plasma has an electron temperature Te expressed in electron volts which is smaller than B, where B is a breakdown voltage of the insulated gate expressed in volts, thereby allowing electrons to enter a conductive pattern appearing between insulating patterns having an aspect ratio higher than 1.

Claim 3

Independent Claim 140 words

A method of manufacturing a semiconductor device comprising the steps of: (a) transporting a semiconductor wafer comprising a semiconductor layer, a field insulating film and a gate insulating film formed on said semiconductor layer, said gate insulating film having a breakdown voltage of B Volts and a thickness of 10 nm or thinner, a conductive layer of a structured antenna formed on said gate insulating film and said field insulating film, said conductive layer having an antenna ratio of 500 or higher, and an insulating material pattern formed on said conductive layer, said insulating material pattern having an opening with an aspect ratio larger than 1; and (b) processing said semiconductor wafer in plasma having an electron temperature of Te expressed in electron volts, wherein Te is equal to or less than B over all areas of said semiconductor wafer.

Claim 4

Independent Claim 140 words

A method of manufacturing a semiconductor device comprising the steps of: (a) transporting a semiconductor wafer comprising a semiconductor layer, a field insulating film and a gate insulating film formed on said semiconductor layer, said gate insulating film having a breakdown voltage of B Volts and a thickness of 10 nm or thinner, a conductive layer of a structured antenna formed on said gate insulating film and said field insulating film, said conductive layer having an antenna ratio of 500 or higher, and an insulating material pattern formed on said conductive layer, said insulating material pattern having an opening with an aspect ratio larger than 1; and (b) processing said semiconductor wafer in plasma having an electron temperature of Te expressed in electron volts, wherein Te is equal to or less than B over all areas of said semiconductor wafer.

Claim 5

Dependent Claim 23 words

A method according to claim 2, wherein said insulating material pattern is a resist pattern and said step (b) etches said conductive layer.

Claim 6

Dependent Claim 37 words

A method according to claim 2, wherein said semiconductor wafer further comprises an insulating layer between said conductive layer and said insulating material pattern, and said step (b) forms an opening in said insulating layer by etching.

Claim 7

Dependent Claim 30 words

A method according to claim 2, further comprising the step of: (c) processing said semiconductor wafer in plasma having an electron temperature Teh expressed in electron volts higher than Te.

Claim 8

Dependent Claim 12 words

A method according to claim 5, wherein Teh is higher than B.

Claim 9

Dependent Claim 26 words

A method according to claim 5, wherein said step (c) is performed before said step (b), and said steps (b) and (c) are an etching step.

Claim 10

Dependent Claim 26 words

A method according to claim 5, wherein said step (c) is performed after said step (b), and said steps (b) and (c) are a deposition step.

Claim 11

Dependent Claim 15 words

A method according to claim 5, wherein said steps (c) and (b) are alternately performed.

Claim 12

Independent Claim 79 words

A method of manufacturing a semiconductor device comprising the steps of: placing a substrate in a reaction chamber, said substrate having a field insulating film, a gate insulating film and a gate wiring formed thereon; supplying a periodically changing energy to excite plasma over said substrate; and applying a bias to said substrate synchronously with the plasma excitation, a potential of said substrate becoming substantially maximum at a time when an electron temperature of said plasma becomes substantially minimum.

Claim 13

Independent Claim 79 words

A method of manufacturing a semiconductor device comprising the steps of: placing a substrate in a reaction chamber, said substrate having a field insulating film, a gate insulating film and a gate wiring formed thereon; supplying a periodically changing energy to excite plasma over said substrate; and applying a bias to said substrate synchronously with the plasma excitation, a potential of said substrate becoming substantially maximum at a time when an electron temperature of said plasma becomes substantially minimum.

Claim 14

Dependent Claim 82 words

A method according to claim 10, wherein said substantially minimum electron temperature is in the range from Temin to Temin+0.3 (Temax-Temin) where Temax is a highest electron temperature in one cycle and Temin is a lowest electron temperature in one cycle, and said substantially maximum potential of said substrate is in the range from Vsmax to Vsmax-0.1 (Vsmax-Vsmin) where Vsmax is a highest potential of said substrate in one cycle and Vsmin is a lowest potential of said substrate in one cycle.

Claim 15

Dependent Claim 44 words

A method according to claim 10, wherein parameters for excitation of said plasma are selected so as to make said substantially minimum electron temperature in the unit of eV lower than a breakdown voltage in the unit of V of said gate insulating film.

Claim 16

Independent Claim 93 words

A method of manufacturing a semiconductor device comprising the steps of: loading a semiconductor substrate in a reaction chamber, said semiconductor substrate having a field insulating film, a gate insulating film and a gate wiring formed thereon; repeating a supply and a suspension of a plasma exciting main energy over said semiconductor substrate during a first period; and applying a bias potential to said semiconductor substrate synchronously with a transition timing from the suspension to the supply of said plasma exciting main energy, electrons flowing into said semiconductor substrate at said transition timing.

Claim 17

Independent Claim 93 words

A method of manufacturing a semiconductor device comprising the steps of: loading a semiconductor substrate in a reaction chamber, said semiconductor substrate having a field insulating film, a gate insulating film and a gate wiring formed thereon; repeating a supply and a suspension of a plasma exciting main energy over said semiconductor substrate during a first period; and applying a bias potential to said semiconductor substrate synchronously with a transition timing from the suspension to the supply of said plasma exciting main energy, electrons flowing into said semiconductor substrate at said transition timing.

Claim 18

Dependent Claim 51 words

A method according to claim 13, wherein a frequency of the repetition of the supply and the suspension of said plasma exciting main energy is 5 to 500 KHz, and said plasma exciting main energy is a high frequency energy having three or more cycles during a period of the supply.

Claim 19

Dependent Claim 45 words

A method according to claim 13, wherein a frequency of the repetition of the supply and the suspension of said plasma exciting main energy is 5 to 500 KHz, and said plasma exciting main energy has a frequency five times the repetition frequency or higher.

Claim 20

Dependent Claim 43 words

A method according to claim 13, wherein a lead angle e of a phase, at which said bias potential becomes highest, from said timing is -30°≦θ≦60° where one cycle of the repetition frequency of said plasma exciting main energy is represented by 360°.

Claim 21

Dependent Claim 30 words

A method according to claim 13, further comprising the step of: generating plasma by continuously supplying said plasma exciting main energy during a second period different from said first period.

Claim 22

Dependent Claim 26 words

A method according to claim 17, wherein said second period is before said first period, and etching is performed by the plasma during said second period.

Claim 23

Dependent Claim 28 words

A method according to claim 17, wherein said second period is after said first period, and chemical vapor deposition is performed by the plasma during said second period.

Claim 24

Dependent Claim 35 words

A method according to claim 13, wherein during said first period, a plasma exciting auxiliary energy of the same type as said plasma exciting main energy is additionally and continuously applied over said semiconductor substrate.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2001-07-13	2002-01-12	2002-07-14	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2005-07-13	2006-01-12	2006-07-14	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2009-07-13	2010-01-12	2010-07-14	$7700.00	Window Closed / Lapsed

Plasma processing with less damage

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