Configurable electronic device which is compatible with a configuration bitstream of a prior generation configurable electronic device

Claim 2

A configurable electronic device which is compatible with a prior generation configurable electronic device, the prior generation configurable device being configurable by a first bitstream, the configurable electronic device comprising: a first configurable domain which is integrated in the configurable device and configurable by the first bitstream; a second configurable domain which is integrated in the configurable device and optionally configurable by an optional second bitstream concatenated to the first bitstream; and configuration means for loading the first bitstream into said first configurable domain and for loading said second configurable domain with the optional second bitstream; and signal means coupled to said configuration means for indicating when the first bitstream has been loaded into said first configurable domain.

Claim 3

The configurable electronic device of claim 1, further comprising: control means coupled to said signal means and coupled to said second configurable domain for loading said second bitstream into said second configurable domain in response to said signal means indicating said first configurable domain has been loaded.

Claim 4

The configurable electronic device of claim 1, further comprising: interconnection means for interconnecting the second configurable domain with the first configurable domain in response to the optional second bitstream.

Claim 5

A configurable electronic device which is compatible with a prior generation configurable electronic device, the prior generation configurable device being configurable by a first bitstream, the configurable electronic device comprising: a first configurable domain which is integrated in the configurable device and configurable by the first bitstream, said first configurable domain having: a first memory array for storing the first bitstream; a first shift register coupled to said first memory array for receiving the first bitstream and; first signal means for indicating when the first bitstream has been loaded into said first memory array; a second configurable domain which is integrated in the configurable device and optionally configurable by an optional second bitstream concatenated to the first bitstream, said second configurable domain having: a second memory array for storing the optional second bitstream; and a second shift register coupled to said second memory array for receiving the optional second bitstream; a first logic gate having a first input coupled to said first signal means, a second input coupled to receive the input configuration bitstream, and an output coupled to said second shift register, whereby the optional second bitstream is transmitted to said second configurable domain when the first bitstream has been loaded into said first configurable domain.

Claim 6

A configurable electronic device which is compatible with a prior generation configurable electronic device, the prior generation configurable device being configurable by a first bitstream, the configurable electronic device comprising: a first configurable domain which is integrated in the configurable device and configurable by the first bitstream, said first configurable domain having: a first memory array for storing the first bitstream; a first shift register coupled to said first memory array for receiving the first bitstream and; first signal means for indicating when the first bitstream has been loaded into said first memory array; a second configurable domain which is integrated in the configurable device and optionally configurable by an optional second bitstream concatenated to the first bitstream, said second configurable domain having: a second memory array for storing the optional second bitstream; and a second shift register coupled to said second memory array for receiving the optional second bitstream; a first logic gate having a first input coupled to said first signal means, a second input coupled to receive the input configuration bitstream, and an output coupled to said second shift register, whereby the optional second bitstream is transmitted to said second configurable domain when the first bitstream has been loaded into said first configurable domain.

Claim 7

The configurable electronic device of claim 4, wherein: said second configurable domain has a second signal means for indicating when the optional second bitstream has been loaded into said second memory array; and the configurable electronic device further comprises a second logic gate having a first input coupled to said second signal means, a second input coupled to receive the output of said first logic gate, and an output coupled to an additional configurable domain, whereby an additional bitstream which is concatenated to the second bitstream is transmitted to an additional configurable domain when the second bitstream has been loaded into said second configurable domain.

Claim 8

The configurable electronic device of claim 4, further comprising: interconnection means for interconnecting the second configurable domain with the first configurable domain in response to the optional second bitstream.

Claim 9

A configurable electronic device which is compatible with a prior generation configurable electronic device, the prior generation configurable device being configurable by a first bitstream, the configurable electronic device comprising: a first configurable domain which is integrated in the configurable device and configurable by the first bitstream; first configuration means for loading the first bitstream into said first configurable domain, the first bitstream having an extension code for indicating whether another configurable domain within the configurable device is to receive bits which follow the first bitstream; a second configurable domain which is integrated in the configurable device and optionally configurable by an optional second bitstream concatenated to the first bitstream; second configuration means coupled to said second configurable domain and coupled to said first configuration means for loading said second configurable domain with said second bitstream; and bypass means coupled to said first configuration means for receiving said extension code and coupled to said second configuration means for transmitting said second bitstream to said second configuration means if directed by said extension code, whereby said second bitstream may optionally bypass said second configurable domain.

Claim 10

A configurable electronic device which is compatible with a prior generation configurable electronic device, the prior generation configurable device being configurable by a first bitstream, the configurable electronic device comprising: a first configurable domain which is integrated in the configurable device and configurable by the first bitstream; first configuration means for loading the first bitstream into said first configurable domain, the first bitstream having an extension code for indicating whether another configurable domain within the configurable device is to receive bits which follow the first bitstream; a second configurable domain which is integrated in the configurable device and optionally configurable by an optional second bitstream concatenated to the first bitstream; second configuration means coupled to said second configurable domain and coupled to said first configuration means for loading said second configurable domain with said second bitstream; and bypass means coupled to said first configuration means for receiving said extension code and coupled to said second configuration means for transmitting said second bitstream to said second configuration means if directed by said extension code, whereby said second bitstream may optionally bypass said second configurable domain.

Claim 11

The configurable electronic device of claim 7, further comprising: first signal means coupled to said first configuration means for indicating when the first bitstream has been loaded into said first configurable domain; second signal means coupled to said second configuration means for indicating when said optional second bitstream has been loaded into said second configurable domain; and overflow means, coupled to said first signal means and said second signal means, for transmitting a third bit stream which is concatenated to the optional second bit stream of the configurable device when said first bitstream has been loaded into said first configurable domain and said second bitstream has been loaded into said second configurable domain, whereby said third bit stream is routed to a daisy-chained configurable device.

Claim 12

The configurable electronic device of claim 7, further comprising: interconnection means for interconnecting the second configurable domain with the first configurable domain in response to the optional second bitstream.

Claim 13

A configurable electronic device which is compatible with a prior generation configurable electronic device, the prior generation configurable device being configurable by a first bitstream, the configurable electronic device comprising: a first configurable domain which is integrated in the configurable device and configurable by the first bitstream, the first bitstream having an extension code for indicating whether another configurable domain within the configurable device is to receive bits which follow the first bitstream, said first configurable domain having: a first memory array for storing the first bitstream; a first shift register for receiving the first bitstream and coupled to said first memory array; and first signal means for indicating when the first bitstream has been loaded into said first memory array and when the extension code indicates that bits which follow the first bitstream are to be transmitted to another configurable domain; a second configurable domain which is integrated in the configurable device and optionally configurable by an optional second bitstream concatenated to the first bitstream, said second configurable domain having: a second memory array for storing the optional second bitstream; and a second shift register for receiving the optional second bitstream and coupled to said second memory array; a first logic gate having a first input coupled to said first signal means, a second input coupled to receive the input configuration bitstream, and an output coupled to said second shift register, whereby the optional second bitstream is transmitted to said second configurable domain when the first bitstream has been loaded into said first configurable domain and the extension code indicates another configurable domain within the configurable device is to receive bits which follow the first bitstream.

Claim 14

A configurable electronic device which is compatible with a prior generation configurable electronic device, the prior generation configurable device being configurable by a first bitstream, the configurable electronic device comprising: a first configurable domain which is integrated in the configurable device and configurable by the first bitstream, the first bitstream having an extension code for indicating whether another configurable domain within the configurable device is to receive bits which follow the first bitstream, said first configurable domain having: a first memory array for storing the first bitstream; a first shift register for receiving the first bitstream and coupled to said first memory array; and first signal means for indicating when the first bitstream has been loaded into said first memory array and when the extension code indicates that bits which follow the first bitstream are to be transmitted to another configurable domain; a second configurable domain which is integrated in the configurable device and optionally configurable by an optional second bitstream concatenated to the first bitstream, said second configurable domain having: a second memory array for storing the optional second bitstream; and a second shift register for receiving the optional second bitstream and coupled to said second memory array; a first logic gate having a first input coupled to said first signal means, a second input coupled to receive the input configuration bitstream, and an output coupled to said second shift register, whereby the optional second bitstream is transmitted to said second configurable domain when the first bitstream has been loaded into said first configurable domain and the extension code indicates another configurable domain within the configurable device is to receive bits which follow the first bitstream.

Claim 15

The configurable electronic device of claim 10, further comprising bypass means coupled to said first signal means for receiving the input bitstream and transmitting the second bitstream to another configurable domain if said first configurable has been loaded with the first bitstream and the extension code indicates that said second configurable domain should be bypassed.

Claim 18

The method of claim 12, further comprising the step of interconnecting the first configurable domain and the second configurable domain in response to said second bitstream.

Claim 21

The method of claim 14 further comprising the step of transmitting the second bitstream of the configurable device if the second bitstream is concatenated to the first bitstream and the extension code indicates that the second configurable domain is not to be loaded with bits which follow the first bitstream, whereby the second configurable domain is bypassed in loading configuration data.

Claim 22

The method of claim 14 further comprising the step of interconnecting the first configurable domain with the second configurable domain in response to the second bitstream if the extension code indicates that the second configurable domain is to be loaded with bits which follow the first bitstream.