Patent EP0253495A2 successfully refreshed from Google Patents.
US5771182A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Bit-serial digital compressor
Assignee: Motorola Solutions Inc
•
Filing: 1996-05-31
•
Granted: 1998-06-23
•
Expires: 2016-05-31
Abstract
Abstract A bit-serial compressor (106) has a pre-divider circuit (208) receiving input serial data and generating a partial numerator. Divider circuit (210) divides the partial numerator by a denominator and generates a partial remainder that is fed back to the pre-divider circuit (208). Divider circuit (210) also generates serial data that is sent to an absolute value circuit (216) and then to a bit-serial filter (218). Bit-serial filter (218) generates an average signal from the serial data. A comparator circuit (224) compares the average signal to a threshold signal and generates the greater of the average signal or the threshold signal for use as a denominator in a next division cycle. The divider circuit includes an overflow control circuit (618) which detects overflow from the carryout bit of the partial remainder operation at the beginning of a division cycle and the sign bit of the numerator. If overflow is detected, the output is clipped according to whether the numerator is positive or negative.
Inventors
- 👤 James Clark Baker
- 👤 John Paul Oliver
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 21:20
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/493; H03; H03G; H03G11/00; H03G11/008; H03G7/00; H03G7/007; H03M; H03M7/00; H03M7/30
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
76 words
A bit-serial digital compressor comprising: a bit-serial input for receiving a digital word representing a numerator; a divider circuit connected to the bit-serial input for dividing the digital word representing the numerator by a digital word representing a denominator and generating a digital word representing a quotient; a bit-serial absolute value circuit connected to the divider; and a bit-serial filter connected to the bit-serial absolute value circuit for generating a digital word representing a next denominator.
Claim 2
Dependent Claim
76 words
A bit-serial digital compressor comprising: a bit-serial input for receiving a digital word representing a numerator; a divider circuit connected to the bit-serial input for dividing the digital word representing the numerator by a digital word representing a denominator and generating a digital word representing a quotient; a bit-serial absolute value circuit connected to the divider; and a bit-serial filter connected to the bit-serial absolute value circuit for generating a digital word representing a next denominator.
Claim 3
Dependent Claim
42 words
A bit-serial digital compressor according to claim 1 further comprising: a bit-serial pre-divider circuit connected to the bit-serial input and an input of the divider circuit for generating a digital word representing a partial numerator from the digital word representing the numerator.
Claim 4
Dependent Claim
54 words
A bit-serial digital compressor according to claim 2 wherein the bit-serial pre-divider circuit generates N M-bit digital words representing partial numerators, where N is equal to the number of bits in the digital word representing the numerator and M is equal to the number of bits in a digital word representing the partial numerator.
Claim 5
Dependent Claim
28 words
A bit-serial digital compressor according to claim 2 wherein the divider circuit also generates a digital word representing a partial remainder that is sent to the pre-divider circuit.
Claim 6
Dependent Claim
41 words
A bit-serial digital compressor according to claim 2 wherein the divider circuit detects an overflow condition using a carryout bit of a first partial remainder calculation of a division cycle and a sign bit of the digital word representing the numerator.
Claim 7
Dependent Claim
27 words
A bit-serial digital compressor according to claim 5 wherein the divider circuit generates a threshold signal as the digital word representing the quotient during the overflow condition.
Claim 8
Dependent Claim
54 words
A bit-serial digital compressor according to claim 1 further comprising: a comparator connected to the bit-serial filter for comparing an output of the bit-serial filter to a threshold signal and generating a digital word representing a next denominator equivalent to the greater of either the output of the bit-serial filter or the threshold signal.
Claim 9
Dependent Claim
19 words
A bit-serial digital compressor according to claim 7 wherein the threshold signal represents at least a -30 dB compression.
Claim 10
Dependent Claim
32 words
A bit-serial digital compressor according to claim 1 further comprising: a MSB/LSB converter connected to the divider circuit for converting the digital word representing the quotient from MSB-first format to LSB-first format.
Claim 11
Dependent Claim
17 words
A bit-serial digital compressor according to claim 1 wherein the bit-serial filter is a wave digital filter.
Claim 12
Dependent Claim
16 words
A bit-serial digital compressor according to claim 1 wherein the bit-serial filter is a lowpass filter.
Claim 13
Dependent Claim
125 words
A bit-serial digital compressor comprising: a bit-serial pre-divider circuit for generating a digital word representing a partial numerator from a digital word representing a numerator; a divider circuit connected to the bit-serial pre-divider circuit for dividing the digital word representing the partial numerator by a digital word representing a denominator and generating a digital word representing a quotient; a bit-serial absolute value circuit connected to an output of the divider circuit; a bit-serial filter connected to the bit-serial absolute value circuit for generating an averaged signal; and a comparator circuit connected to the bit-serial filter for comparing the averaged signal to a threshold signal and generating a digital word representing a denominator equivalent to the greater of either the averaged signal or the threshold signal.
Claim 14
Dependent Claim
125 words
A bit-serial digital compressor comprising: a bit-serial pre-divider circuit for generating a digital word representing a partial numerator from a digital word representing a numerator; a divider circuit connected to the bit-serial pre-divider circuit for dividing the digital word representing the partial numerator by a digital word representing a denominator and generating a digital word representing a quotient; a bit-serial absolute value circuit connected to an output of the divider circuit; a bit-serial filter connected to the bit-serial absolute value circuit for generating an averaged signal; and a comparator circuit connected to the bit-serial filter for comparing the averaged signal to a threshold signal and generating a digital word representing a denominator equivalent to the greater of either the averaged signal or the threshold signal.
Claim 15
Dependent Claim
28 words
A bit-serial digital compressor according to claim 12 wherein the divider circuit generates a digital word representing a partial remainder that is fed back to the pre-divider circuit.
Claim 16
Dependent Claim
37 words
A bit-serial digital compressor according to claim 12 wherein the divider circuit performs N partial divisions in a complete division cycle, where N is equivalent to the number of bits in the digital word representing the numerator.
Claim 17
Dependent Claim
108 words
A transmitter comprising: an amplifier having a gain set to prevent overflow in a bit-serial compressor; and a bit-serial compressor connected to the amplifier comprising: a divider circuit for dividing a digital word representing a numerator by a digital word representing a denominator and generating a digital word representing a quotient; a bit-serial absolute value circuit connected to the divider; bit-serial filter connected to the bit-serial absolute value circuit for generating an averaged signal; and a comparator circuit for comparing the average signal to a threshold signal and outputting a greater one of the averaged signal or the threshold signal as a digital word representing a next denominator.
Claim 18
Dependent Claim
108 words
A transmitter comprising: an amplifier having a gain set to prevent overflow in a bit-serial compressor; and a bit-serial compressor connected to the amplifier comprising: a divider circuit for dividing a digital word representing a numerator by a digital word representing a denominator and generating a digital word representing a quotient; a bit-serial absolute value circuit connected to the divider; bit-serial filter connected to the bit-serial absolute value circuit for generating an averaged signal; and a comparator circuit for comparing the average signal to a threshold signal and outputting a greater one of the averaged signal or the threshold signal as a digital word representing a next denominator.
Claim 19
Dependent Claim
139 words
A radiotelephone comprising: an amplifier having a gain set to prevent overflow in a bit-serial compressor; and a bit-serial compressor connected to the amplifier comprising: a bit-serial pre-divider circuit for generating a digital word representing a partial numerator from a digital word representing a numerator; a divider circuit connected to the bit-serial pre-divider circuit for dividing the digital word representing the partial numerator by a digital word representing a denominator and generating a digital word representing a quotient; a bit-serial absolute value circuit connected to the divider circuit; bit-serial filter connected to the divider circuit for generating an averaged signal; and a comparator circuit connected to the bit-serial filter for comparing the averaged signal to a threshold signal and outputting a greater one of the averaged signal or the threshold signal as a digital word representing a next denominator.
Claim 20
Dependent Claim
139 words
A radiotelephone comprising: an amplifier having a gain set to prevent overflow in a bit-serial compressor; and a bit-serial compressor connected to the amplifier comprising: a bit-serial pre-divider circuit for generating a digital word representing a partial numerator from a digital word representing a numerator; a divider circuit connected to the bit-serial pre-divider circuit for dividing the digital word representing the partial numerator by a digital word representing a denominator and generating a digital word representing a quotient; a bit-serial absolute value circuit connected to the divider circuit; bit-serial filter connected to the divider circuit for generating an averaged signal; and a comparator circuit connected to the bit-serial filter for comparing the averaged signal to a threshold signal and outputting a greater one of the averaged signal or the threshold signal as a digital word representing a next denominator.
Claim 21
Dependent Claim
87 words
A bit-serial digital divider comprising: a bit-serial pre-divider circuit connected to a bit-serial input for generating a digital word representing a partial numerator from a digital word representing a numerator and a digital word representing a partial remainder; a divider circuit connected to the bit-serial pre-divider circuit for dividing the digital word representing the partial numerator by a digital word representing a denominator and generating a carryout bit and also generating the digital word representing the partial remainder that is fed back to the bit-serial pre-divider circuit.
Claim 22
Dependent Claim
87 words
A bit-serial digital divider comprising: a bit-serial pre-divider circuit connected to a bit-serial input for generating a digital word representing a partial numerator from a digital word representing a numerator and a digital word representing a partial remainder; a divider circuit connected to the bit-serial pre-divider circuit for dividing the digital word representing the partial numerator by a digital word representing a denominator and generating a carryout bit and also generating the digital word representing the partial remainder that is fed back to the bit-serial pre-divider circuit.
Claim 23
Dependent Claim
46 words
A bit-serial digital divider according to claim 17 wherein the divider circuit further comprises: an overflow control circuit for generating a quotient bit from the carryout bit if no overflow occurs, a positive limit if positive overflow occurs, or a negative limit if negative overflow occurs.
Claim 24
Dependent Claim
30 words
A bit-serial digital divider according to claim 17 wherein the bit-serial input is in LSB-first format and the bit-serial pre-divider converts the bit-serial input from LSB-first format to MSB-first format.
Claim 25
Dependent Claim
27 words
A bit-serial digital divider according to claim 19 further comprising: a MSB/LSB converter circuit for converting an output of the divider from MSB-first format to LSB-first format.
References Cited (Backward Citations)
US3274341A
Cited
US3378677A
Cited
US3816733A
Cited
US4271499A
Cited
US4285047A
Cited
US4802222A
Cited
US4799242A
Cited
US4930126A
Cited
US5065451A
Cited
US5122762A
Cited
US5226004A
Cited
US5204831A
Cited
US5303279A
Cited
US5270962A
Cited
US5583967A
Cited
US5388126A
Cited
US5337338A
Cited
US5321645A
Cited
US5459681A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-06-22 | 2001-12-22 | 2002-06-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-06-22 | 2005-12-22 | 2006-06-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-06-22 | 2009-12-22 | 2010-06-23 | $7700.00 | Window Closed / Lapsed |