US5765024A
Expired / Lapsed
US
⏱️ 0.0 years remaining
System for requesting access to DMA channel having address not in DMA registers by replacing address of DMA register with address of requested DMA channel
Assignee: Hewlett Packard Enterprise Development LP
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Filing: 1996-04-26
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Granted: 1998-06-09
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Expires: 2016-04-26
Abstract
Abstract A distributed direct memory access (DMA) architecture where greater than seven DMA channels are provided and utilized. Alternative methods are disclosed for paging or swapping DMA channels so that more than seven may exist in a computer system, but only seven may be available at a time to remain compatible with conventional DMA controller software. In one method, channels may be assigned identical addresses, with one enabled at one time. In another method, channels are assigned unique addresses but the DMA master addresses only a subset of of the total number of channels so that up to seven are available to compatible software at any one time.
Inventors
- 👤 Dwight D. Riley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 09:28
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/28; G06F13/10; G06F13/12; G06F13/124; G06F13/126
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
197 words
A method of allowing more than a limited number of direct memory access (DMA) channels in a computer system, the computer system having a main memory, a DMA master and a floppy drive for performing DMA transfers, said DMA master for passing cycles to said limited number of DMA channels, the computer system having a greater number of DMA channels than said limited number of DMA channels, each DMA channel having a unique base address, said DMA master having a limited number of registers for holding a limited number of unique base addresses corresponding to said unique base addresses of a limited number of DMA channels, the method comprising the steps of: receiving a cycle requesting access to a first DMA channel corresponding to said floppy drive, said first DMA channel having a base address not corresponding to the base addresses contained in said limited number of DMA master registers; replacing a base address of one of said DMA master registers with the base address of said requested DMA channel so said DMA master may address said first DMA channel; passing said request cycle to said DMA master; and performing said request cycle to said floppy drive.
Claim 2
Independent Claim
197 words
A method of allowing more than a limited number of direct memory access (DMA) channels in a computer system, the computer system having a main memory, a DMA master and a floppy drive for performing DMA transfers, said DMA master for passing cycles to said limited number of DMA channels, the computer system having a greater number of DMA channels than said limited number of DMA channels, each DMA channel having a unique base address, said DMA master having a limited number of registers for holding a limited number of unique base addresses corresponding to said unique base addresses of a limited number of DMA channels, the method comprising the steps of: receiving a cycle requesting access to a first DMA channel corresponding to said floppy drive, said first DMA channel having a base address not corresponding to the base addresses contained in said limited number of DMA master registers; replacing a base address of one of said DMA master registers with the base address of said requested DMA channel so said DMA master may address said first DMA channel; passing said request cycle to said DMA master; and performing said request cycle to said floppy drive.
Claim 3
Dependent Claim
30 words
The method of claim 1, wherein said replacing step further includes the step of: determining which DMA channel corresponding to said limited number of DMA master registers will be replaced.
Claim 4
Dependent Claim
119 words
The method of claim 2, wherein each of said limited number of DMA channels have a logical channel assignment, wherein said DMA channels greater than said limited number of DMA channels have a logical channel assignment according to said limited number of DMA channels, and wherein said determining step further includes the steps of: determining which of said limited number of DMA channels corresponding to said limited number of DMA master registers has a logical channel assignment that is equal to a logical channel assignment of said first DMA channel; and selecting said DMA channel corresponding to a DMA master register having a logical channel assignment equal to said logical channel assignment of said first DMA channel for replacement.
Claim 5
Dependent Claim
75 words
The method of claim 1, where said replacing step further includes the step of : replacing a portion of said DMA master registers corresponding to a portion of said limited number of DMA channels with an equal number of new base addresses corresponding to an alternative set of DMA channels so said DMA master may access said alternative set of DMA channels, said first DMA channel being included in said alternative set of DMA channels.
Claim 6
Dependent Claim
27 words
The method of claim 4, wherein said limited number of DMA channels is seven and said portion includes all seven of said limited number of DMA channels.
Claim 7
Dependent Claim
14 words
The method of claim 1, wherein said limited number of DMA channels is seven.
Claim 8
Dependent Claim
25 words
The method of claim 1, wherein said access request causes said DMA channel to perform a DMA transfer between said floppy drive and said memory.
Claim 9
Independent Claim
185 words
A method of allowing more than a limited number of direct memory access (DMA) channels in a computer system, the computer system having a main memory, a DMA master and a floppy drive for performing DMA transfers, said DMA master for passing cycles to said limited number of DMA channels, the computer system having a greater number of DMA channels than said limited number of DMA channels, each DMA channel having a configuration register for containing one of a limited number of base addresses and an enable bit, only a limited number of DMA channels being enabled at one time, said DMA master having a limited number of configuration registers for holding the limited number of base addresses, the method comprising the steps of: enabling a limited number of DMA channels; receiving a cycle requesting access to a first DMA channel corresponding to said floppy drive, said first DMA channel not being enabled; disabling one of the limited number of enabled DMA channels; enabling said first DMA channel; passing said request cycle to said DMA master; and performing said request cycle to said floppy drive.
Claim 10
Independent Claim
185 words
A method of allowing more than a limited number of direct memory access (DMA) channels in a computer system, the computer system having a main memory, a DMA master and a floppy drive for performing DMA transfers, said DMA master for passing cycles to said limited number of DMA channels, the computer system having a greater number of DMA channels than said limited number of DMA channels, each DMA channel having a configuration register for containing one of a limited number of base addresses and an enable bit, only a limited number of DMA channels being enabled at one time, said DMA master having a limited number of configuration registers for holding the limited number of base addresses, the method comprising the steps of: enabling a limited number of DMA channels; receiving a cycle requesting access to a first DMA channel corresponding to said floppy drive, said first DMA channel not being enabled; disabling one of the limited number of enabled DMA channels; enabling said first DMA channel; passing said request cycle to said DMA master; and performing said request cycle to said floppy drive.
Claim 11
Dependent Claim
54 words
The method of claim 8, wherein one of said limited number of DMA channels is enabled and has an address equal to said first DMA channel and wherein said disabling step further includes the step of: determining which of said limited number of DMA channels has an address equal to said first DMA channel.
Claim 12
Dependent Claim
29 words
The method of claim 9, wherein said disabling step further includes the step of: disabling said DMA channel determined to have an address equal to said first DMA channel.
Claim 13
Dependent Claim
14 words
The method of claim 8, wherein said limited number of DMA channels is seven.
Claim 14
Dependent Claim
25 words
The method of claim 8, wherein said access request causes said DMA channel to perform a DMA transfer between said floppy drive and said memory.
Claim 15
Independent Claim
232 words
A method of allowing more than a limited number of direct memory access (DMA) channels in a computer system, the computer system having a main memory, a DMA master and a floppy drive for performing DMA transfers, said DMA master for passing cycles to said limited number of DMA channels, the computer system having a greater number of DMA channels than said limited number of DMA channels, each DMA channel having a configuration register for holding a unique base address, said DMA master having a limited number of registers for holding a limited number of unique base addresses corresponding to said unique base addresses of a limited number of DMA channels, the method comprising the steps of: receiving a cycle requesting access a first DMA channel corresponding to said floppy drive, said first DMA channel having a base address not corresponding to the base addresses contained in said limited number of DMA master registers; setting said base address of said first DMA channel to an address equal to one of the base addresses contained in said limited number of DMA master registers; setting a base address of one of said limited number of DMA channels to an address not corresponding to one of the base addresses contained in said limited number of DMA master registers; passing said request cycle to said DMA master; and performing said request cycle to said floppy drive.
Claim 16
Independent Claim
232 words
A method of allowing more than a limited number of direct memory access (DMA) channels in a computer system, the computer system having a main memory, a DMA master and a floppy drive for performing DMA transfers, said DMA master for passing cycles to said limited number of DMA channels, the computer system having a greater number of DMA channels than said limited number of DMA channels, each DMA channel having a configuration register for holding a unique base address, said DMA master having a limited number of registers for holding a limited number of unique base addresses corresponding to said unique base addresses of a limited number of DMA channels, the method comprising the steps of: receiving a cycle requesting access a first DMA channel corresponding to said floppy drive, said first DMA channel having a base address not corresponding to the base addresses contained in said limited number of DMA master registers; setting said base address of said first DMA channel to an address equal to one of the base addresses contained in said limited number of DMA master registers; setting a base address of one of said limited number of DMA channels to an address not corresponding to one of the base addresses contained in said limited number of DMA master registers; passing said request cycle to said DMA master; and performing said request cycle to said floppy drive.
Claim 17
Dependent Claim
138 words
The method of claim 13, wherein each of said limited number of DMA channels have a logical channel assignment, wherein said DMA channels greater than said limited number of DMA channels have a logical channel assignment according to said limited number of DMA channels, and wherein said setting a base address of one of said limited number of DMA channels step further includes the steps of: determining which of said limited number of DMA channels corresponding to said limited number of DMA master registers has a logical channel assignment that is equal to a logical channel assignment of said first DMA channel; and selecting said DMA channel corresponding to a DMA master register having a logical channel assignment equal to said logical channel assignment of said first DMA channel for setting the base address to a non-corresponding addresss.
Claim 18
Dependent Claim
14 words
The method of claim 13, wherein said limited number of DMA channels is seven.
Claim 19
Dependent Claim
25 words
The method of claim 13, wherein said access request causes said DMA channel to perform a DMA transfer between said floppy drive and said memory.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-06-08 | 2001-12-08 | 2002-06-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-06-08 | 2005-12-08 | 2006-06-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-06-08 | 2009-12-08 | 2010-06-09 | $7700.00 | Window Closed / Lapsed |