US5764928A — Microprocessor communication protocol in a multip…

Claim 1

Independent Claim 181 words

A method of communicating in a transmitter between a transmitter sensor microprocessor and a transmitter electronics microprocessor in a multi-processor transmitter environment wherein the microprocessors are connected by an interface having a bus system, the method comprising the steps of: sending a first logic signal to the transmitter sensor microprocessor to initiate electronics module to sensor module communication; responding to the first logic signal by sending a second logic signal to the transmitter electronics microprocessor, wherein the second logic signal also provides a first synchronizing signal to the transmitter electronics microprocessor; transferring data from the transmitter sensor microprocessor to the transmitter electronics microprocessor during a selected time period after sending the second logic signal to the transmitter electronics microprocessor, sending a third logic signal to the transmitter electronics microprocessor to initiate sensor module to electronics module communication and to force a transmitter electronics microprocessor interrupt; responding to the transmitter electronics microprocessor interrupt by sending the first logic signal to the transmitter sensor microprocessor; and transferring data from the transmitter electronics microprocessor to the transmitter sensor microprocessor during the selected time period.

Claim 2

Independent Claim 181 words

A method of communicating in a transmitter between a transmitter sensor microprocessor and a transmitter electronics microprocessor in a multi-processor transmitter environment wherein the microprocessors are connected by an interface having a bus system, the method comprising the steps of: sending a first logic signal to the transmitter sensor microprocessor to initiate electronics module to sensor module communication; responding to the first logic signal by sending a second logic signal to the transmitter electronics microprocessor, wherein the second logic signal also provides a first synchronizing signal to the transmitter electronics microprocessor; transferring data from the transmitter sensor microprocessor to the transmitter electronics microprocessor during a selected time period after sending the second logic signal to the transmitter electronics microprocessor, sending a third logic signal to the transmitter electronics microprocessor to initiate sensor module to electronics module communication and to force a transmitter electronics microprocessor interrupt; responding to the transmitter electronics microprocessor interrupt by sending the first logic signal to the transmitter sensor microprocessor; and transferring data from the transmitter electronics microprocessor to the transmitter sensor microprocessor during the selected time period.

Claim 3

Dependent Claim 63 words

The method of claim 1 wherein the transmitter further comprises a memory operably connected to the transmitter sensor microprocessor, wherein the method further comprises the steps of: resetting the transmitter sensor microprocessor during power-up; up-loading data from the memory to the transmitter electronics microprocessor; and providing a second synchronizing signal to synchronize the transmitter electronics microprocessor with the transmitter sensor microprocessor after power-up.

Claim 4

Dependent Claim 85 words

A computer readable storage media containing a set of instructions, the set of instructions supporting a communications protocol operable in a multi-processor transmitter environment for controlling a plurality of transmitter modules including a sensor module and an electronics module, the set of instructions comprising: a set of instructions formed into each of a plurality of procedures, the procedures comprising: a sensor update procedure; a receive data procedure; a send data procedure; a send command procedure; an indexed read procedure; and a read memory direct procedure.

Claim 5

Dependent Claim 85 words

A computer readable storage media containing a set of instructions, the set of instructions supporting a communications protocol operable in a multi-processor transmitter environment for controlling a plurality of transmitter modules including a sensor module and an electronics module, the set of instructions comprising: a set of instructions formed into each of a plurality of procedures, the procedures comprising: a sensor update procedure; a receive data procedure; a send data procedure; a send command procedure; an indexed read procedure; and a read memory direct procedure.

Claim 6

Dependent Claim 16 words

The storage media of claim 3 wherein the plurality of procedures further comprises a power-up procedure.

Claim 7

Dependent Claim 16 words

The storage media of claim 4 wherein the power-up procedure includes a sensor data transfer procedure.

Claim 8

Dependent Claim 53 words

The storage media of claim 4 wherein the power-up procedure comprises: instructions for causing the electronics module to reset the sensor module during power-up; and instructions for causing the electronics module to upload data from the sensor module and provide a signal to synchronize the electronics module with the sensor module after power-up.

Claim 9

Dependent Claim 37 words

The storage media of claim 3 wherein the sensor update procedure comprises: instructions for causing synchronization between the sensor module and the electronics module; and instructions for causing the electronics module to read from the sensor module.

Claim 10

Dependent Claim 66 words

The storage media of claim 3 wherein the indexed read procedure comprises: instructions for causing index data to be sent from the electronics module to the sensor module; instructions for causing data representing a number of process variables to be sent from the electronics module to the sensor module; and instructions for causing the electronics module to store data regarding process variables in the electronics module.

Claim 11

Dependent Claim 65 words

The storage media of claim 3 wherein the read memory direct procedure comprises: instructions for causing the electronics module to send a memory address to the sensor module; instructions for causing the electronics module to send size data corresponding with an amount of memory data to the sensor module; and instructions for causing the sensor module to send the memory data to the electronics module.

Claim 12

Dependent Claim 215 words

A communication protocol operable in a multiprocessor transmitter environment including a sensor module having a transmitter sensor microprocessor and a sensor memory, the sensor module suitable for receiving process variables, and an electronics module having a transmitter electronics microprocessor wherein the transmitter sensor and electronics microprocessors each include a plurality of individually controllable output pins and a plurality of individually readable input pins, and wherein the transmitter sensor and electronics microprocessors are connected by an interface having a bus system, the communication protocol comprising: instructions for causing synchronization between the transmitter sensor microprocessor and the transmitter electronics microprocessor and for causing the transmitter electronics microprocessor to read from the sensor memory; instructions for causing the transmitter electronics microprocessor to read data indicative of at least one process variable from the sensor module; instructions for causing the transmitter electronics microprocessor to send a first sequence of data representing index data and the process variables to the sensor microprocessor and for causing the transmitter sensor module to send memory data from the sensor memory to the transmitter electronics microprocessor; instructions for causing the transmitter electronics microprocessor to send a second sequence of data representing sensor memory address data size to the sensor memory and for causing the sensor memory to send memory data to the electronics module.

Claim 13

Dependent Claim 215 words

A communication protocol operable in a multiprocessor transmitter environment including a sensor module having a transmitter sensor microprocessor and a sensor memory, the sensor module suitable for receiving process variables, and an electronics module having a transmitter electronics microprocessor wherein the transmitter sensor and electronics microprocessors each include a plurality of individually controllable output pins and a plurality of individually readable input pins, and wherein the transmitter sensor and electronics microprocessors are connected by an interface having a bus system, the communication protocol comprising: instructions for causing synchronization between the transmitter sensor microprocessor and the transmitter electronics microprocessor and for causing the transmitter electronics microprocessor to read from the sensor memory; instructions for causing the transmitter electronics microprocessor to read data indicative of at least one process variable from the sensor module; instructions for causing the transmitter electronics microprocessor to send a first sequence of data representing index data and the process variables to the sensor microprocessor and for causing the transmitter sensor module to send memory data from the sensor memory to the transmitter electronics microprocessor; instructions for causing the transmitter electronics microprocessor to send a second sequence of data representing sensor memory address data size to the sensor memory and for causing the sensor memory to send memory data to the electronics module.

Claim 14

Independent Claim 86 words

An apparatus operable in a multiprocessor transmitter environment for controlling a plurality of transmitter modules connected by an interface, the apparatus comprising: a plurality of pins connected to the interface; a register corresponding with a single pin and operably coupled to the interface; means for sending a first logic signal along the interface to a module and initiating communication between two modules; means for synchronizing communication between the modules; and means for repeatedly transferring data between two modules and along the interface and between sensor interrupts.

Claim 15

Independent Claim 86 words

An apparatus operable in a multiprocessor transmitter environment for controlling a plurality of transmitter modules connected by an interface, the apparatus comprising: a plurality of pins connected to the interface; a register corresponding with a single pin and operably coupled to the interface; means for sending a first logic signal along the interface to a module and initiating communication between two modules; means for synchronizing communication between the modules; and means for repeatedly transferring data between two modules and along the interface and between sensor interrupts.

Claim 16

Dependent Claim 23 words

The apparatus of claim 11 further comprising means for adapting the speed of the interface to accommodate individual requirements of the transmitter modules.

Claim 17

Dependent Claim 25 words

The method of claim 1 wherein the step of transferring data includes transferring data from the transmitter sensor microprocessor to the transmitter electronics microprocessor serially.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2001-06-08	2001-12-08	2002-06-09	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2005-06-08	2005-12-08	2006-06-09	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2009-06-08	2009-12-08	2010-06-09	$7700.00	Window Closed / Lapsed

Microprocessor communication protocol in a multiprocessor transmitter

Abstract

Inventors

Bibliographic Details

Claims Analysis

References Cited (Backward Citations)

USPTO Annuity & Maintenance Windows

Assigned Categories & Tags

Assign Category Tag