Apparatus for controlling the impedance of high speed signals on a printed circuit board

Claim 2

A computer system comprising a printed circuit board, said printed circuit board comprising: a substrate having a front side and a back side; a plurality of signal traces on both said front side and said back side of said substrate; and a ground/power trace formed on said front side and said back side of said substrate in a fanned out manner from a ground/power pin location point on said printed circuit board such that said ground/power trace is interleaved with said plurality of said signal traces.

Claim 3

A printed circuit board comprising: a dielectric board having a front side and a back side; a plurality of signal traces formed on said front side and said back side of said dielectric board; and a ground/power trace interleaved between said plurality of signal traces on said front side and said back side of said dielectric board such that a substantial portion of each one of said plurality of said signal traces is substantially parallel and adjacent to said ground/power trace, said interleaved ground/power trace originating from a ground/power node of an integrated circuit location.

Claim 4

A printed circuit board comprising: a dielectric board having a front side and a back side; a plurality of signal traces formed on said front side and said back side of said dielectric board; and a ground/power trace interleaved between said plurality of signal traces on said front side and said back side of said dielectric board such that a substantial portion of each one of said plurality of said signal traces is substantially parallel and adjacent to said ground/power trace, said interleaved ground/power trace originating from a ground/power node of an integrated circuit location.

Claim 5

The printed circuit board of claim 2, wherein an impedance of each one of said plurality of signal traces is set at a predetermined impedance.

Claim 6

A printed circuit board comprising: a substrate board having a front side and a back side; a first signal trace on said front side of said substrate board; a ground/power trace originating from a location and fanned-out such that said ground/power trace is placed substantially alongside and spaced from both sides of said first signal trace on said front side of said substrate board and substantially adjacent to said signal trace on said backside of said substrate board such that an impedance of said signal trace is substantially constant, said location is a ground/power pin location of an integrated circuit.

Claim 7

A printed circuit board comprising: a substrate board having a front side and a back side; a first signal trace on said front side of said substrate board; a ground/power trace originating from a location and fanned-out such that said ground/power trace is placed substantially alongside and spaced from both sides of said first signal trace on said front side of said substrate board and substantially adjacent to said signal trace on said backside of said substrate board such that an impedance of said signal trace is substantially constant, said location is a ground/power pin location of an integrated circuit.

Claim 8

The printed circuit board of claim 4, further comprising a second signal trace positioned substantially parallel and adjacent to said ground/power trace on said back side of said substrate board.

Claim 9

A computer comprising a printed circuit board, said printed circuit board comprising: a substrate board having a front side and a back side; a first signal trace on said front side of said substrate board; a ground/power trace originating from a location and fanned-out such that said ground/power trace is placed substantially alongside and spaced from both sides of said first signal trace on said front side of said substrate board and substantially adjacent to said signal trace on said backside of said substrate board such that an impedance of said signal trace is substantially constant, said location is a ground/power pin location of an integrated circuit.

Claim 10

A computer comprising a printed circuit board, said printed circuit board comprising: a substrate board having a front side and a back side; a first signal trace on said front side of said substrate board; a ground/power trace originating from a location and fanned-out such that said ground/power trace is placed substantially alongside and spaced from both sides of said first signal trace on said front side of said substrate board and substantially adjacent to said signal trace on said backside of said substrate board such that an impedance of said signal trace is substantially constant, said location is a ground/power pin location of an integrated circuit.

Claim 11

A double sided printed circuit board comprising: a first signal trace on a first side of said printed circuit board beginning at a first location and terminating at a second location, said first location is a first signal pin of a first integrated circuit; a trace having a relatively constant potential, said trace being on, at least, one side of said first signal trace and on said first side of said printed circuit board, said trace further being on a second side of said printed circuit board such that said trace is opposite said signal trace, said trace and said first signal trace together providing a relatively uniform impedance on said signal trace.

Claim 12

A double sided printed circuit board comprising: a first signal trace on a first side of said printed circuit board beginning at a first location and terminating at a second location, said first location is a first signal pin of a first integrated circuit; a trace having a relatively constant potential, said trace being on, at least, one side of said first signal trace and on said first side of said printed circuit board, said trace further being on a second side of said printed circuit board such that said trace is opposite said signal trace, said trace and said first signal trace together providing a relatively uniform impedance on said signal trace.

Claim 13

The double sided printed circuit board of claim 7, wherein said second location is a first signal pin of a second integrated circuit.

Claim 14

A circuit on a printed circuit board having a top side and a bottom side, comprising: a first integrated circuit having N signal pins and M ground/power pin(s) wherein N is greater or equal to M, N signal traces, positioned in a parallel fashion on a first side and second side of a printed circuit board, connected, one each, to said N signal pins; M ground/power trace(s) connected, one each, to said M ground/power pin(s), said M ground/power trace(s) being fanned out such that said M ground/power trace(s) are interleaved between said N signal traces such that each one of said N signal traces has at least one of said M ground/power traces on each side and each one of said N signal traces has one of said M ground/power trace parallel to and directly on the opposite side of said printed circuit board with respect to each one of said N signal traces.

Claim 15

A circuit on a printed circuit board having a top side and a bottom side, comprising: a first integrated circuit having N signal pins and M ground/power pin(s) wherein N is greater or equal to M, N signal traces, positioned in a parallel fashion on a first side and second side of a printed circuit board, connected, one each, to said N signal pins; M ground/power trace(s) connected, one each, to said M ground/power pin(s), said M ground/power trace(s) being fanned out such that said M ground/power trace(s) are interleaved between said N signal traces such that each one of said N signal traces has at least one of said M ground/power traces on each side and each one of said N signal traces has one of said M ground/power trace parallel to and directly on the opposite side of said printed circuit board with respect to each one of said N signal traces.

Claim 16

The circuit of claim 9, wherein said N signal traces have a predetermined impedance.

Claim 17

The circuit of claim 9, wherein crosstalk between said N signal traces is minimized.

Claim 18

The circuit of claim 9, wherein said N signal traces are connected to a second integrated circuit having N signal pins.

Claim 19

A computer comprising a circuit on a printed circuit board having a top side and a bottom side, said circuit on said printed circuit board comprising: a first integrated circuit having N signal pins and M ground/power pin (s) wherein N is greater or equal to M, N signal traces, positioned in a parallel fashion on a first side and second side of a printed circuit board, connected, one each, to said N signal pins; M ground/power trace(s) connected, one each, to said M ground/power pin(s), said M ground/power trace(s) being fanned out such that said M ground/power trace(s) are interleaved between said N signal traces such that each one of said N signal traces has at least one of said M ground/power traces on each side and each one of said N signal traces has one of said M ground/power trace parallel to and directly on the opposite side of said printed circuit board with respect to each one of said N signal traces.

Claim 20

A computer comprising a circuit on a printed circuit board having a top side and a bottom side, said circuit on said printed circuit board comprising: a first integrated circuit having N signal pins and M ground/power pin (s) wherein N is greater or equal to M, N signal traces, positioned in a parallel fashion on a first side and second side of a printed circuit board, connected, one each, to said N signal pins; M ground/power trace(s) connected, one each, to said M ground/power pin(s), said M ground/power trace(s) being fanned out such that said M ground/power trace(s) are interleaved between said N signal traces such that each one of said N signal traces has at least one of said M ground/power traces on each side and each one of said N signal traces has one of said M ground/power trace parallel to and directly on the opposite side of said printed circuit board with respect to each one of said N signal traces.

Claim 21

A circuit on a printed circuit board wherein said printed circuit board has a first side and a second side, comprising: a first set of substantially parallel signal traces on said first side of said printed circuit board; a second set of substantially parallel signal traces on said second side of said printed circuit board, said second set of said substantially parallel signal traces being substantially parallel to and staggered between said first set of substantially parallel signal traces; at least one ground/power trace being fanned out from a ground/power pin location of an integrated circuit on at least one of said first side and said second side of said printed circuit board such that said at least one said ground/power trace is interposed between said first set and said second set of substantially parallel signal traces.

Claim 22

A circuit on a printed circuit board wherein said printed circuit board has a first side and a second side, comprising: a first set of substantially parallel signal traces on said first side of said printed circuit board; a second set of substantially parallel signal traces on said second side of said printed circuit board, said second set of said substantially parallel signal traces being substantially parallel to and staggered between said first set of substantially parallel signal traces; at least one ground/power trace being fanned out from a ground/power pin location of an integrated circuit on at least one of said first side and said second side of said printed circuit board such that said at least one said ground/power trace is interposed between said first set and said second set of substantially parallel signal traces.

Claim 23

The circuit of claim 14, wherein said first set and said second set of substantially parallel signal traces are connected to at least one integrated circuit.

Claim 24

The circuit of claim 14, wherein said at least one ground/power trace is connected to a ground/power pin of an integrated circuit.

Claim 25

The circuit of claim 14, wherein said first set and said second set of substantially parallel signal traces are adapted to have a predetermined impedance and contribute to a minimum amount of crosstalk.

Claim 26

The circuit of claim 14, wherein said circuit is incorporated into a computer.