US5751379A
Expired / Lapsed
US
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Method to reduce perceptual contouring in display systems
Assignee: Texas Instruments Inc
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Filing: 1996-10-04
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Granted: 1998-05-12
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Expires: 2016-10-04
Abstract
Abstract A method of pulse width modulation using a spatial light modulator (40) with a finite transition time. The method uses m bits per sample to digitize the incoming data, but apportions the LSB times for pulse width modulation based upon m-1 bits. The current video frame displays all of the bits for each sample, except for the LSBs for each sample. The next video frame displays all of the bits for each sample, adding one more LSB for dividing up the frame time. The first frame could use either the additional LSB time and display no data, or it could use only that number of LSB times it needs. In the latter, the system will have to adjust to different partitions of the frame time for alternating frames. The system includes a spatial light modulator (40), a memory (42), a formatter (48), a sequence controller (44) and a toggle circuit (46), to perform this method.
Inventors
- 👤 Vishal Markandey
- 👤 Donald B. Doherty
- 👤 Robert J. Gove
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:42
CPC Classifications
G; G09; G09G; G09G5/00; G09G3/00; G09G3/20; G09G3/2007; G09G3/2018; G09G3/2022; G09G3/2037; H; H04; H04N; H04N5/00; H04N5/74; H04N5/7416; H04N5/7458; G09G2320/00; G09G2320/02; G09G2320/0266; G09G3/34; G09G3/3433; G09G3/346; H04N2005/7466
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
131 words
A method of displaying digital video data using pulse width modulation, comprising: apportioning least significant bit times within a video frame time using pulse width modulation based upon a pulse width modulation scheme having fewer bits than that actually used for digital sampling; displaying a first frame of said video data within said frame time wherein said frame has a predetermined number of least significant bit times, such that all bits of any sample within said first frame are displayed except the least significant bits; displaying a second frame of said video data within said frame time wherein said frame has as predetermined number of least significant bit times plus one least significant bit time, such that more bits of any sample than were displayed in said first frame are displayed.
Claim 2
Independent Claim
131 words
A method of displaying digital video data using pulse width modulation, comprising: apportioning least significant bit times within a video frame time using pulse width modulation based upon a pulse width modulation scheme having fewer bits than that actually used for digital sampling; displaying a first frame of said video data within said frame time wherein said frame has a predetermined number of least significant bit times, such that all bits of any sample within said first frame are displayed except the least significant bits; displaying a second frame of said video data within said frame time wherein said frame has as predetermined number of least significant bit times plus one least significant bit time, such that more bits of any sample than were displayed in said first frame are displayed.
Claim 3
Dependent Claim
24 words
The method of claim 1 wherein pulse width modulation scheme has 7 bits and wherein 8 bits were actually used for said digital sampling.
Claim 4
Dependent Claim
24 words
The method of claim 1 wherein pulse width modulation scheme has 8 bits and wherein 9 bits were actually used for said digital sampling.
Claim 5
Dependent Claim
18 words
The method of claim 1 further comprising the step of displaying the least significant bit every fourth frame.
Claim 6
Dependent Claim
183 words
A circuit for controlling the pulse width modulation of data on a spatial light modulator comprising: a memory in connection with said spatial light modulator operable to store and send data to said modulator; a formatter in connection with said memory capable of formatting incoming video data, including the function of digitizing said data at a predetermined sampling rate of m bits per pixel; a sequence controller in connection with said memory and said spatial light modulator operable to control data flow from said memory to said modulator and pulse width modulation of said data by said modulator; and a toggle circuit in connection with said sequence controller which receives a frame synch signal and uses said frame synch signal to send signals to said sequence controller, wherein said signals cause said sequence controller to control said pulse width modulation such that said spatial light modulator alternates between using a first frame format in which all but the least significant bits per pixel is displayed and a second frame format in which more bits per pixel than in said first frame is displayed.
Claim 7
Dependent Claim
183 words
A circuit for controlling the pulse width modulation of data on a spatial light modulator comprising: a memory in connection with said spatial light modulator operable to store and send data to said modulator; a formatter in connection with said memory capable of formatting incoming video data, including the function of digitizing said data at a predetermined sampling rate of m bits per pixel; a sequence controller in connection with said memory and said spatial light modulator operable to control data flow from said memory to said modulator and pulse width modulation of said data by said modulator; and a toggle circuit in connection with said sequence controller which receives a frame synch signal and uses said frame synch signal to send signals to said sequence controller, wherein said signals cause said sequence controller to control said pulse width modulation such that said spatial light modulator alternates between using a first frame format in which all but the least significant bits per pixel is displayed and a second frame format in which more bits per pixel than in said first frame is displayed.
Claim 8
Dependent Claim
40 words
The system of claim 5 wherein said toggle circuit also uses said frame synch signals to signal said sequence controller to control said pulse width modulation such that the least significant bit of any sample is displayed every fourth frame.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-05-11 | 2001-11-10 | 2002-05-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-05-11 | 2005-11-10 | 2006-05-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-05-11 | 2009-11-10 | 2010-05-12 | $7700.00 | Window Closed / Lapsed |