Circuit for searching/sorting data in neural networks

Claim 1

In a neural network comprised of N neuron circuits (11-1, . . . , 11-i, . . . , 11-N), a plurality of said N neuron circuits having calculated a distance between an input vector (A) and the prototype vector (B), said distance being p bits wide and stored in the neuron's weight memory, an aggregate circuit (517) comprising: a plurality of search/sort circuits, each of said plurality of search/sort circuits being in one of said plurality of N neuron circuits, each search/sort circuit (502-i) comprising: at least p series connected elementary search/sort units (510-1i to 510-pi), each said elementary search/sort unit (510-ki) receiving a distance bit signal (dki), an exclude output signal (EXCLINki) and a feedback signal ORk) and, generating therefrom a local (neuron) output signal (NOUTk-i) and an exclude output signal (EXCLOUTki), and said exclude output signal of each said series connected elementary search/sort unit being the exclude input signal of the next said series connected elementary search/sort unit; each of said plurality of search/sort circuits forming a column, such that each said search/sort circuit's at least p series connected elementary search/sort units of said aggregate circuit form a matrix; said distance bit signals of the same bit rank forming an input row for each said elementary search/sort unit in said matrix row; each said neuron circuit's local output signal (NOUTk-i) being equal to the complemented value of the neuron circuit's distance bit signal (dki) if the elementary search/sort unit's exclude input signal is inactive (EXCLINki=0) or being equal to the true value thereof if the elementary search/sort unit's exclude input signal is active; the elementary search/sort unit's exclude output signal is active (EXCLOUTki=1) if the feedback bit signal (ORk) is the complement of the distance bit signal (dki); each feedback bit signal (ORk) resulting from ORing all of the local output bit signals (NOUTk-1 to NOUTk-N) generated by each of the elementary search/sort units of row k for all the columns of the matrix, each of the elementary search/sort unit comprising: first logic circuit means (520) comprised of inverting means (524-i) connected to the last elementary search/sort unit (510-pi) processing the last bit (dpi) for producing a signal (XOR-i) equal to the complement of the exclude output signal (EXCLOUTpi) generated therein; and, second logic circuit means (519) for processing the first distance bit signal (d1i) as an exclude input signal (EXCLIN-i) and comprised of a two-way OR gate (522-i) connected in series with a latch (523-i), the output of said latch being connected to the first elementary search/sort unit (510-1i) and connected to the first input terminal of said two-way OR gate, the other input of said two way OR gate receiving said signal (XOR-i) generated by the said first logical circuit means.