US5737616A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Power supply circuit with power saving capability
Assignee: NEC Corp
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Filing: 1996-05-15
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Granted: 1998-04-07
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Expires: 2016-05-15
Abstract
Abstract A power supply circuit efficiently saves electric energy consumed by a central processing unit and a peripheral assembly through coordination between power supply modes of the central processing unit and the peripheral assembly. The central processing unit has a register for establishing a status of an internal power supply of the central processing unit, a first mechanism for changing the internal power supply into the status established by the register, and a second mechanism for outputting a status signal indicative of the status. The peripheral assembly having a peripheral circuit, a peripheral device, and a power supply control block for changing power supply statuses and clock statuses of the peripheral circuit and the peripheral device based on the status signal outputted from the second mechanism.
Inventors
- 👤 Mitsuhiro Watanabe
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 06:18
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/26; G06F1/32; G06F1/3203; G06F1/3206; G06F1/3215; G06F1/3234; G06F1/325
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
108 words
A power supply circuit comprising: a central processing unit; and a peripheral assembly connected to said central processing unit; said central processing unit having a register for establishing a status of an internal power supply of the central processing unit, a first mechanism for changing the internal power supply into the status established by said register, and a second mechanism for outputting a status signal indicative of said status; said peripheral assembly having a peripheral circuit, a peripheral device, and control means for changing power supply statuses and clock statuses of the peripheral circuit and the peripheral device based on the status signal outputted from said second mechanism.
Claim 2
Dependent Claim
108 words
A power supply circuit comprising: a central processing unit; and a peripheral assembly connected to said central processing unit; said central processing unit having a register for establishing a status of an internal power supply of the central processing unit, a first mechanism for changing the internal power supply into the status established by said register, and a second mechanism for outputting a status signal indicative of said status; said peripheral assembly having a peripheral circuit, a peripheral device, and control means for changing power supply statuses and clock statuses of the peripheral circuit and the peripheral device based on the status signal outputted from said second mechanism.
Claim 3
Dependent Claim
51 words
A power supply circuit according to claim 1, wherein said control means comprises means for determining priority ranks of the peripheral circuit and the peripheral device based on said status signal and changing the power supply statuses of the peripheral circuit and the peripheral device according to the determined priority ranks.
Claim 4
Dependent Claim
60 words
A power supply circuit according to claim 1, wherein said register, said first mechanism, and said second mechanism comprise a power supply mode control register, and said control means comprises a power supply control block, and wherein said power supply mode control register controls the power supply statuses and clock statuses which are changed by said power supply control block.
Claim 5
Dependent Claim
20 words
A power supply circuit according to claim 3, wherein said power supply control block is programmable by an external signal.
Claim 6
Dependent Claim
108 words
A power supply circuit comprising: a central processing unit; and a peripheral assembly connected to said central processing unit; said peripheral assembly having a peripheral circuit, a peripheral device, a power supply control block for varying power supply statuses or clock frequencies of the peripheral circuit and the peripheral device according to a setting, and a first mechanism for outputting a status signal indicative of the power supply statuses of the peripheral circuit and the peripheral device based on the setting; said central processing unit having a second mechanism for changing power supply statuses and clock statuses thereof based on the status signal outputted from said first mechanism.
Claim 7
Dependent Claim
108 words
A power supply circuit comprising: a central processing unit; and a peripheral assembly connected to said central processing unit; said peripheral assembly having a peripheral circuit, a peripheral device, a power supply control block for varying power supply statuses or clock frequencies of the peripheral circuit and the peripheral device according to a setting, and a first mechanism for outputting a status signal indicative of the power supply statuses of the peripheral circuit and the peripheral device based on the setting; said central processing unit having a second mechanism for changing power supply statuses and clock statuses thereof based on the status signal outputted from said first mechanism.
Claim 8
Dependent Claim
50 words
A power supply circuit according to claim 5, wherein said second mechanism comprises means for determining priority ranks of the peripheral circuit and the peripheral device based on said status signal and changing the power supply statuses and clock statuses of said central processing unit based on said status signal.
Claim 9
Dependent Claim
41 words
A power supply circuit according to claim 5, wherein said second mechanism comprises power supply mode control input means for changing the power supply statuses of the central processing unit as controlled by data established in said power supply control block.
Claim 10
Dependent Claim
22 words
A power supply circuit according to claim 5 or 7, wherein said power supply control block is programmable by an external signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-04-06 | 2001-10-06 | 2002-04-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-04-06 | 2005-10-06 | 2006-04-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-04-06 | 2009-10-06 | 2010-04-07 | $7700.00 | Window Closed / Lapsed |