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US5726466A Expired / Lapsed US ⏱️ 0.0 years remaining

Press pack power semiconductor device incorporating a plurality of semiconductor elements

Assignee: Toshiba Corp
•
Filing: 1996-08-15
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Granted: 1998-03-10
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Expires: 2016-08-15
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Abstract

Abstract A press pack power semiconductor device incorporates a number of semiconductor elements. The power semiconductor device has a first insulating frame surrounding each of the semiconductor elements and having a lattice for positioning the semiconductor elements. First and second hard metal electrode plates are provided on the respective sides of each semiconductor element. A first electrode member is in contact with the first hard metal electrode plate. A second insulating frame, having a lattice for positioning the second hard metal electrode plate, is laid on the first insulating frame. A second electrode member is provided. This second electrode member has a lattice-shaped groove in which a lattice-shaped frame portion of the second insulating frame is fitted for positioning.

Inventors

  • 👤 Kazunobu Nishitani

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 19:11
CPC Classifications
H; H10; H10W; H10W72/00; H10W76/00; H10W76/10; H10W76/12; H10W76/13; H10W76/138

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 113 words
A press pack power semiconductor device comprising: a plurality of semiconductor elements arranged in one plane; a first insulating frame surrounding each of the semiconductor elements and having a lattice for positioning the semiconductor elements; first and second hard metal electrode plates provided on respective sides of each of the semiconductor elements; a first electrode member which is in contact with the first hard metal electrode plate; a second insulating frame laid on the first insulating frame and having a lattice for positioning the second hard metal electrode plate; and a second electrode member having a lattice-shaped groove in which a lattice-shaped frame portion of the second insulating frame is fitted for positioning.
Claim 2
Dependent Claim 113 words
A press pack power semiconductor device comprising: a plurality of semiconductor elements arranged in one plane; a first insulating frame surrounding each of the semiconductor elements and having a lattice for positioning the semiconductor elements; first and second hard metal electrode plates provided on respective sides of each of the semiconductor elements; a first electrode member which is in contact with the first hard metal electrode plate; a second insulating frame laid on the first insulating frame and having a lattice for positioning the second hard metal electrode plate; and a second electrode member having a lattice-shaped groove in which a lattice-shaped frame portion of the second insulating frame is fitted for positioning.
Claim 3
Dependent Claim 50 words
A press pack power semiconductor device according to claim 1, wherein said first insulating frame and said second insulating frame defines a region where a signal wire is arranged, said signal wire electrically connecting electrodes of the semiconductor elements to an external gate terminal and has no insulating outer sheath.
Claim 4
Dependent Claim 22 words
A press pack power semiconductor device according to claim 1, wherein said semiconductor elements are switching elements for a power semiconductor device.
Claim 5
Dependent Claim 56 words
A press pack power semiconductor device according to claim 1, wherein said second hard metal electrode plate includes a plurality of plate elements corresponding to respective ones of the semiconductor elements, and said plate elements are placed on the respective ones of the semiconductor elements which are positioned in openings defined in the first insulating frame.
Claim 6
Dependent Claim 34 words
A press pack power semiconductor device according to claim 1, wherein said second insulating frame has openings defined by a lattice structure, and said second hard metal electrode plate is fitted in the openings.
Claim 7
Dependent Claim 50 words
A press pack power semiconductor device according to claim 1, wherein said second insulating frame includes an outer frame portion, and said outer frame portion has an inner periphery which engages with outer portions of the first insulating frame, the first hard metal electrode plate and the first electrode member.
Claim 8
Dependent Claim 23 words
A press pack power semiconductor device according to claim 1, wherein said second insulating frame has a lattice frame portion with a projection.
Claim 9
Dependent Claim 28 words
A press pack power semiconductor device according to claim 7, wherein said groove of the second electrode member is fitted around the projection of the second insulating frame.
Claim 10
Dependent Claim 21 words
A press pack power semiconductor device according to claim 2, wherein said signal wire is arranged on the first insulating frame.
Claim 11
Dependent Claim 43 words
A press pack power semiconductor device according to claim 9, wherein said first insulating frame includes a terminal member which is to be electrically connected to a terminal of the semiconductor elements, and said terminal member is electrically connected to the signal wire.
Claim 12
Dependent Claim 27 words
A press pack power semiconductor device according to claim 10, wherein said terminal member is a needle-like metal member which has a pressure-generating mechanism employing a spring.
Claim 13
Dependent Claim 20 words
A press pack power semiconductor device according to claim 1, wherein said semiconductor elements includes an IGBT and a diode.
Claim 14
Dependent Claim 37 words
A press pack power semiconductor device according to claim 1, wherein said first insulating frame includes openings, and each of the openings is surrounded by a frame having step sections in which the semiconductor elements are fitted.
Claim 15
Dependent Claim 119 words
A press pack power semiconductor device comprising: a plurality of semiconductor elements arranged in one plane; a first insulating frame surrounding each of the semiconductor elements and having a lattice for positioning the semiconductor elements; a first electrode member which is in contact with one side of each of the semiconductor elements; a second insulating frame having a lattice-shaped frame portion corresponding to a position of each of the semiconductor elements, and an outer frame portion located around the lattice-shaped frame portion, said outer frame portion having an inner periphery which engages with outer portions of the first insulating frame and the first electrode member; and a second electrode member for holding the semiconductor elements in a pressed state.
Claim 16
Dependent Claim 119 words
A press pack power semiconductor device comprising: a plurality of semiconductor elements arranged in one plane; a first insulating frame surrounding each of the semiconductor elements and having a lattice for positioning the semiconductor elements; a first electrode member which is in contact with one side of each of the semiconductor elements; a second insulating frame having a lattice-shaped frame portion corresponding to a position of each of the semiconductor elements, and an outer frame portion located around the lattice-shaped frame portion, said outer frame portion having an inner periphery which engages with outer portions of the first insulating frame and the first electrode member; and a second electrode member for holding the semiconductor elements in a pressed state.

References Cited (Backward Citations)

JPH04137561A Cited
US5610439A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-03-09 2001-09-08 2002-03-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-03-09 2005-09-08 2006-03-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-03-09 2009-09-08 2010-03-10 $7700.00 Window Closed / Lapsed

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