Video decoder apparatus using non-reference frame as an additional prediction source and method therefor

Claim 2

In a system for decoding compressed video information, a method for determining a plurality of pixel values for a macroblock within a frame "N" of a given type, in a sequence of video frames including a previous frame "N-1" of the given type, comprising the steps of: decoding from the compressed video information a descriptor for the macroblock within the frame "N", said descriptor providing information necessary for directing the computation of pixel values for the macroblock within the frame "N"; comparing the descriptor corresponding to the macroblock within the frame "N" to a descriptor corresponding to a respective macroblock within the previous frame "N-1"; and determining a plurality of pixel values corresponding to the macroblock within the frame "N" by reusing a plurality of pixel values corresponding to the respective macroblock within the previous frame "N-1" when the respective descriptors associated with the respective macroblocks within the respective frames "N" and "N-1" differ by less than a predetermined similarity threshold, and otherwise by computation in a manner as directed by the descriptor associated with the macroblock within the frame "N".

Claim 3

A method as in claim 1 wherein the descriptor comprises an indication that a respective macroblock corresponding thereto is a skipped macroblock.

Claim 4

A method as in claim 1 wherein the descriptor comprises a motion vector for a respective macroblock corresponding thereto, said motion vector relative to a frame of a type different than the given type.

Claim 5

A method as in claim 1 wherein a plurality of pixel values comprises a plurality of display pixel values.

Claim 6

A method as in claim 1 wherein a plurality of pixel values comprises a plurality of motion-compensated pixel values.

Claim 7

A method as in claim 1 wherein the predetermined similarity threshold is adaptively adjusted based upon an achieved frame rate relative to a desired frame rate of the system.

Claim 8

A method as in claim 1 wherein the predetermined similarity threshold is staticly selected based upon a target frame rate.

Claim 9

A method as in claim 1 wherein the compressed video information comprises MPEG compressed video information.

Claim 10

A method as in claim 8 wherein a frame of the given type comprises a B-frame.

Claim 11

A method as in claim 1 wherein the system comprises a general purpose processor system.

Claim 12

A method as in claim 1 wherein the system comprises a special purpose hardware system.

Claim 13

In a system for decoding compressed video information, an apparatus for determining a plurality of pixel values for a macroblock within a frame "N" of a given type, in a sequence of video frames including a previous frame "N-1" of the given type, comprising: a decoder circuit for decoding from the compressed video information a descriptor corresponding to the macroblock within the frame "N", said descriptor providing information necessary for directing the computation of pixel values for the macroblock within the frame "N"; a descriptor buffer circuit for storing a descriptor corresponding to a respective macroblock within the frame "N-1"; a comparator circuit for comparing the descriptor corresponding to the macroblock within the frame "N" to the descriptor corresponding to the respective macroblock within the previous frame "N-1"; a frame buffer circuit for storing a plurality of pixel values for the respective macroblock within the frame "N-1", for reusing said plurality of pixel values stored therewithin when the respective descriptors associated with the respective macroblocks within the frames "N" and "N-1" differ by less than a predetermined similarity threshold; and a pixel circuit for determining, when the respective descriptors associated with the respective macroblocks within the frames "N" and "N-1" differ by more than a predetermined similarity threshold, a plurality of pixel values corresponding to the macroblock within the frame "N", by computation in a manner as directed by the descriptor associated therewith, and said pixel circuit for storing said plurality of pixel values into the frame buffer circuit, thereby overwriting the plurality of pixel values corresponding to the respective macroblock within the B-frame "N-1" and previously stored therewithin.

Claim 14

In a system for decoding compressed video information, an apparatus for determining a plurality of pixel values for a macroblock within a frame "N" of a given type, in a sequence of video frames including a previous frame "N-1" of the given type, comprising: a decoder circuit for decoding from the compressed video information a descriptor corresponding to the macroblock within the frame "N", said descriptor providing information necessary for directing the computation of pixel values for the macroblock within the frame "N"; a descriptor buffer circuit for storing a descriptor corresponding to a respective macroblock within the frame "N-1"; a comparator circuit for comparing the descriptor corresponding to the macroblock within the frame "N" to the descriptor corresponding to the respective macroblock within the previous frame "N-1"; a frame buffer circuit for storing a plurality of pixel values for the respective macroblock within the frame "N-1", for reusing said plurality of pixel values stored therewithin when the respective descriptors associated with the respective macroblocks within the frames "N" and "N-1" differ by less than a predetermined similarity threshold; and a pixel circuit for determining, when the respective descriptors associated with the respective macroblocks within the frames "N" and "N-1" differ by more than a predetermined similarity threshold, a plurality of pixel values corresponding to the macroblock within the frame "N", by computation in a manner as directed by the descriptor associated therewith, and said pixel circuit for storing said plurality of pixel values into the frame buffer circuit, thereby overwriting the plurality of pixel values corresponding to the respective macroblock within the B-frame "N-1" and previously stored therewithin.

Claim 15

An apparatus as in claim 12 wherein the pixel circuit comprises a motion compensation circuit for generating a plurality of motion-compensated pixel values.

Claim 16

An apparatus as in claim 13 wherein the plurality of pixel values corresponding to a macroblock comprises a plurality of display pixel values, and wherein the pixel circuit further comprises an adder circuit for adding a plurality of pixel error terms to the plurality of motion compensated pixel values.

Claim 17

An apparatus as in claim 13 wherein the plurality of pixel values corresponding to a macroblock comprises a plurality of motion-compensated pixel values, and wherein the pixel circuit further comprises an adder circuit for adding a plurality of pixel error terms to the plurality of motion-compensated pixel values.

Claim 18

In a system for decoding MPEG compressed video information, a method for determining a plurality of display pixel values for a macroblock within a B-frame "N", in a sequence of video frames including a previous B-frame "N-1", comprising the steps of: initializing the plurality of display pixel values for the macroblock within the B-frame "N" with a previously determined plurality of display pixel values corresponding to the respective macroblock within the B-frame "N-1"; decoding from the compressed video information a descriptor for the macroblock within the B-frame "N", said descriptor providing information necessary for directing the computation of display pixel values for the macroblock within the B-frame "N"; comparing the descriptor corresponding to the macroblock within the B-frame "N" to a descriptor corresponding to a respective macroblock within the previous B-frame "N-1"; calculating the plurality of display pixel values for the macroblock within the B-frame "N" if the respective descriptors associated with the respective macroblocks within the B-frame "N" and the B-frame "N-1" differ by more than a predetermined similarity threshold, by computation in a manner as directed by the descriptor associated with the macroblock within the B-frame "N", thereby over-writing the previously initialized plurality of display pixel values from the previous B-frame "N-1"; and reusing the initialized plurality of display pixel values for the macroblock within the B-frame "N" if the respective descriptors associated with the respective macroblocks within the B-frame "N" and the B-frame "N-1" differ by less than the predetermined similarity threshold.

Claim 19

In a system for decoding MPEG compressed video information, a method for determining a plurality of display pixel values for a macroblock within a B-frame "N", in a sequence of video frames including a previous B-frame "N-1", comprising the steps of: initializing the plurality of display pixel values for the macroblock within the B-frame "N" with a previously determined plurality of display pixel values corresponding to the respective macroblock within the B-frame "N-1"; decoding from the compressed video information a descriptor for the macroblock within the B-frame "N", said descriptor providing information necessary for directing the computation of display pixel values for the macroblock within the B-frame "N"; comparing the descriptor corresponding to the macroblock within the B-frame "N" to a descriptor corresponding to a respective macroblock within the previous B-frame "N-1"; calculating the plurality of display pixel values for the macroblock within the B-frame "N" if the respective descriptors associated with the respective macroblocks within the B-frame "N" and the B-frame "N-1" differ by more than a predetermined similarity threshold, by computation in a manner as directed by the descriptor associated with the macroblock within the B-frame "N", thereby over-writing the previously initialized plurality of display pixel values from the previous B-frame "N-1"; and reusing the initialized plurality of display pixel values for the macroblock within the B-frame "N" if the respective descriptors associated with the respective macroblocks within the B-frame "N" and the B-frame "N-1" differ by less than the predetermined similarity threshold.

Claim 20

A method as in claim 16 wherein the descriptor comprises an indication that a respective macroblock corresponding thereto is a skipped macroblock.

Claim 21

A method as in claim 16 wherein the descriptor comprises a motion vector for a respective macroblock corresponding thereto, said motion vector relative to a reference frame.

Claim 22

A method as in claim 16 wherein the descriptor comprises a forward motion vector and a backward motion vector for a respective macroblock corresponding thereto, said forward motion vector relative to a past reference frame, and said backward motion vector relative to a future reference frame.

Claim 23

A method as in claim 16 wherein the predetermined similarity threshold is adaptively adjusted based upon an achieved frame rate relative to a desired frame rate of the system.

Claim 24

A method as in claim 16 wherein the predetermined similarity threshold is staticly selected based upon a target frame rate.

Claim 25

A method as in claim 16 wherein the initializing step comprises reusing a frame buffer containing the previously determined plurality of display pixels corresponding to the respective macroblock within the B-frame "N-1" and already stored therewithin.

Claim 26

In a system for decoding MPEG compressed video information, a method for calculating display pixel values for a macroblock within a B-frame "N", in a sequence of video frames including a previous B-frame "N-1", comprising the steps of: decoding from the compressed video information a motion vector and a plurality of pixel error terms for the macroblock within the B-frame "N"; comparing the motion vector corresponding to the macroblock within the B-frame "N" to a motion vector corresponding to a respective macroblock within the previous B-frame "N-1"; determining a plurality of motion-compensated pixel values corresponding to the macroblock within the B-frame "N" by reusing a plurality of motion-compensated pixel values corresponding to the respective macroblock within the previous B-frame "N-1" when the respective motion vectors associated with the respective macroblocks within the B-frames "N" and "N-1" differ by less than a predetermined similarity threshold, and otherwise by computation in a manner as directed by the motion vector associated with the macroblock within the B-frame "N"; and adding the decoded plurality of pixel error terms to the plurality of motion-compensated pixel values corresponding thereto to complete the plurality of display pixel values for the macroblock within the B-frame "N".

Claim 27

In a system for decoding MPEG compressed video information, a method for calculating display pixel values for a macroblock within a B-frame "N", in a sequence of video frames including a previous B-frame "N-1", comprising the steps of: decoding from the compressed video information a motion vector and a plurality of pixel error terms for the macroblock within the B-frame "N"; comparing the motion vector corresponding to the macroblock within the B-frame "N" to a motion vector corresponding to a respective macroblock within the previous B-frame "N-1"; determining a plurality of motion-compensated pixel values corresponding to the macroblock within the B-frame "N" by reusing a plurality of motion-compensated pixel values corresponding to the respective macroblock within the previous B-frame "N-1" when the respective motion vectors associated with the respective macroblocks within the B-frames "N" and "N-1" differ by less than a predetermined similarity threshold, and otherwise by computation in a manner as directed by the motion vector associated with the macroblock within the B-frame "N"; and adding the decoded plurality of pixel error terms to the plurality of motion-compensated pixel values corresponding thereto to complete the plurality of display pixel values for the macroblock within the B-frame "N".

Claim 28

A method as in claim 23 wherein the predetermined similarity threshold is adaptively adjusted based upon an achieved frame rate relative to a desired frame rate of the system.

Claim 29

A method as in claim 23 wherein the predetermined similarity threshold is staticly selected based upon a target frame rate.

Claim 30

In a system for decoding MPEG compressed video information, an apparatus for determining a plurality of display pixel values for a macroblock within a B-frame "N", in a sequence of video frames including a previous B-frame "N-1", comprising: a decoder circuit for decoding from the compressed video information a motion vector and a plurality of pixel error terms corresponding to the macroblock within the B-frame "N"; a motion vector buffer circuit for storing a motion vector corresponding to a respective macroblock within the B-frame "N-1"; a comparator circuit for comparing the motion vector corresponding to the macroblock within the B-frame "N" to the motion vector corresponding to the respective macroblock within the previous B-frame "N-1"; a frame buffer circuit for storing a plurality of motion-compensated pixel values for the respective macroblock within the B-frame "N-1", for reusing said plurality of motion-compensated pixel values stored therewithin when the respective motion vectors associated with the respective macroblocks within the B-frames "N" and "N-1" differ by less than a predetermined similarity threshold; motion compensation circuit for determining, when the respective groups of motion vectors associated with the respective macroblocks within the B-frames "N" and "N-1" differ by more than the predetermined similarity threshold, a plurality of motion-compensated pixel values corresponding to the macroblock within the B-frame "N", by computation in the manner as directed by the motion vector associated therewith, and for storing said plurality of motion-compensated pixel values into the frame buffer circuit, thereby overwriting the plurality of motion-compensated pixel values previously stored therewithin corresponding to the respective macroblock within the B-frame "N-1"; and an adder circuit for adding the plurality of motion-compensated pixel values corresponding to the macroblock within the B-frame "N" to the decoded plurality of error terms corresponding thereto, thereby producing the plurality of display pixel values for the macroblock within the B-frame "N".

Claim 31

In a system for decoding MPEG compressed video information, an apparatus for determining a plurality of display pixel values for a macroblock within a B-frame "N", in a sequence of video frames including a previous B-frame "N-1", comprising: a decoder circuit for decoding from the compressed video information a motion vector and a plurality of pixel error terms corresponding to the macroblock within the B-frame "N"; a motion vector buffer circuit for storing a motion vector corresponding to a respective macroblock within the B-frame "N-1"; a comparator circuit for comparing the motion vector corresponding to the macroblock within the B-frame "N" to the motion vector corresponding to the respective macroblock within the previous B-frame "N-1"; a frame buffer circuit for storing a plurality of motion-compensated pixel values for the respective macroblock within the B-frame "N-1", for reusing said plurality of motion-compensated pixel values stored therewithin when the respective motion vectors associated with the respective macroblocks within the B-frames "N" and "N-1" differ by less than a predetermined similarity threshold; motion compensation circuit for determining, when the respective groups of motion vectors associated with the respective macroblocks within the B-frames "N" and "N-1" differ by more than the predetermined similarity threshold, a plurality of motion-compensated pixel values corresponding to the macroblock within the B-frame "N", by computation in the manner as directed by the motion vector associated therewith, and for storing said plurality of motion-compensated pixel values into the frame buffer circuit, thereby overwriting the plurality of motion-compensated pixel values previously stored therewithin corresponding to the respective macroblock within the B-frame "N-1"; and an adder circuit for adding the plurality of motion-compensated pixel values corresponding to the macroblock within the B-frame "N" to the decoded plurality of error terms corresponding thereto, thereby producing the plurality of display pixel values for the macroblock within the B-frame "N".

Claim 32

An apparatus as in claim 26 wherein a motion vector corresponding to a macroblock within a B-frame comprises a forward motion vector relative to a past reference frame.

Claim 33

An apparatus as in claim 26 wherein a motion vector corresponding to a macroblock within a B-frame comprises a backward motion vector relative to a future reference frame.

Claim 34

An apparatus as in claim 26 wherein a motion vector corresponding to a macroblock within a B-frame comprises both a forward motion vector relative to a past reference frame and a backward motion vector relative to a future reference frame.

Claim 35

An apparatus as in claim 26 wherein the apparatus is implemented within a general purpose processor system.

Claim 36

An apparatus as in claim 26 wherein the apparatus is implemented within a special purpose hardware system.

Claim 37

In a system for decoding MPEG compressed video information, an apparatus for determining a plurality of display pixel values for a macroblock within a B-frame "N", in a sequence of video frames including a previous B-frame "N-1", comprising: a decoder circuit for decoding from the compressed video information a motion vector and a plurality of pixel error terms corresponding to the macroblock within the B-frame "N"; a motion vector buffer circuit for storing a motion vector corresponding to a respective macroblock within the B-frame "N-1"; a comparator circuit for comparing the motion vector corresponding to the macroblock within the B-frame "N" to the motion vector corresponding to the respective macroblock within the previous B-frame "N-1"; a frame buffer circuit for storing a plurality of display pixel values for the respective macroblock within the B-frame "N-1", for reusing said plurality of display pixel values stored therewithin, when the respective motion vectors associated with the respective macroblocks within the B-frames "N" and "N-1" differ by less than a predetermined similarity threshold; a motion compensation circuit for determining, when the respective motion vectors associated with the respective macroblocks within the B-frames "N" and "N-1" differ by more than the predetermined similarity threshold, a plurality of motion-compensated pixel values corresponding to the macroblock within the B-frame "N", by computation in a manner as directed by the motion vector associated therewith; and an adder circuit for adding the plurality of motion-compensated pixel values corresponding to the macroblock within the B-frame "N" to the decoded plurality of error terms corresponding thereto, thereby producing the plurality of display pixel values for the macroblock within the B-frame "N", and for storing said plurality of display pixel values into the frame buffer circuit, thereby overwriting the plurality of display pixel values corresponding to the respective macroblock within the B-frame "N-1" and previously stored therewithin.

Claim 38

In a system for decoding MPEG compressed video information, an apparatus for determining a plurality of display pixel values for a macroblock within a B-frame "N", in a sequence of video frames including a previous B-frame "N-1", comprising: a decoder circuit for decoding from the compressed video information a motion vector and a plurality of pixel error terms corresponding to the macroblock within the B-frame "N"; a motion vector buffer circuit for storing a motion vector corresponding to a respective macroblock within the B-frame "N-1"; a comparator circuit for comparing the motion vector corresponding to the macroblock within the B-frame "N" to the motion vector corresponding to the respective macroblock within the previous B-frame "N-1"; a frame buffer circuit for storing a plurality of display pixel values for the respective macroblock within the B-frame "N-1", for reusing said plurality of display pixel values stored therewithin, when the respective motion vectors associated with the respective macroblocks within the B-frames "N" and "N-1" differ by less than a predetermined similarity threshold; a motion compensation circuit for determining, when the respective motion vectors associated with the respective macroblocks within the B-frames "N" and "N-1" differ by more than the predetermined similarity threshold, a plurality of motion-compensated pixel values corresponding to the macroblock within the B-frame "N", by computation in a manner as directed by the motion vector associated therewith; and an adder circuit for adding the plurality of motion-compensated pixel values corresponding to the macroblock within the B-frame "N" to the decoded plurality of error terms corresponding thereto, thereby producing the plurality of display pixel values for the macroblock within the B-frame "N", and for storing said plurality of display pixel values into the frame buffer circuit, thereby overwriting the plurality of display pixel values corresponding to the respective macroblock within the B-frame "N-1" and previously stored therewithin.

Claim 39

An apparatus as in claim 32 wherein a motion vector corresponding to a macroblock within a B-frame comprises a forward motion vector relative to a past reference frame.

Claim 40

An apparatus as in claim 32 wherein a motion vector corresponding to a macroblock within a B-frame comprises a backward motion vector relative to a future reference frame.

Claim 41

An apparatus as in claim 32 wherein a motion vector corresponding to a macroblock within a B-frame comprises both a forward motion vector relative to a past reference frame and a backward motion vector relative to a future reference frame.

Claim 42

An apparatus as in claim 32 wherein the apparatus is implemented within a general purpose processor system.

Claim 43

An apparatus as in claim 32 wherein the apparatus is implemented within a special purpose hardware system.

Claim 44

An apparatus as in claim 36 wherein the motion compensation circuit includes: a forward motion compensation circuit for generating a plurality of forward-predicted motion-compensated pixel values; a backward motion compensation circuit for generating a plurality of backward-predicted motion-compensated pixel values; and an adder for generating a plurality of bi-predicted motion-compensated pixel values.