US5724376A
Expired / Lapsed
US
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Transparent substrate vertical cavity surface emitting lasers fabricated by semiconductor wafer bonding
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1995-11-30
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Granted: 1998-03-03
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Expires: 2015-11-30
Abstract
Abstract A method for fabricating transparent substrate vertical cavity surface emitting lasers ("VCSEL"s) using wafer bonding is described. The VCSELs have their active layers located much more closely to a heat sink than is possible in known absorbing substrate VCSELs. The improved heat transport from the active layer to the heat sink permits higher current operation with increased light output as a result of the lower thermal impedance of the system. Alternatively, the same light output can be obtained from the wafer bonded VCSEL at lower drive currents. Additional embodiments use wafer bonding to improve current crowding, current and/or optical confinement in a VCSEL and to integrate additional optoelectronic devices with the VCSEL.
Inventors
- 👤 Fred A. Kish, Jr.
- 👤 Richard P. Schneider, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 13:45
CPC Classifications
H; H01; H01S; H01S5/00; H01S5/02; H01S5/0206; H01S5/0217; H01S5/10; H01S5/18; H01S5/183; H01S5/0215; H01S5/022; H01S5/0233; H01S5/0234; H01S5/024; H01S5/026; H01S5/0262; H01S5/0264; H01S5/18305; H01S5/18308; H01S5/18361; H01S5/1838; H01S5/18386; H01S5/18388; H01S5/30; H01S5/32; H01S5/323; H01S5/32308; H01S5/32341
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
55 words
A vertical cavity surface emitting laser diode comprising: an active layer having an upper and lower surface; upper and lower reflectors on the upper and lower surfaces of the active layer and adjacent thereto; a transparent substrate wafer bonded to the upper distributed Bragg reflector; and contacts for applying a voltage across the active region.
Claim 2
Dependent Claim
55 words
A vertical cavity surface emitting laser diode comprising: an active layer having an upper and lower surface; upper and lower reflectors on the upper and lower surfaces of the active layer and adjacent thereto; a transparent substrate wafer bonded to the upper distributed Bragg reflector; and contacts for applying a voltage across the active region.
Claim 3
Dependent Claim
17 words
The vertical cavity surface emitting laser diode of claim 1 wherein the diode exhibits low thermal resistance.
Claim 4
Dependent Claim
31 words
The vertical cavity surface emitting laser diode of claim 2 wherein a heat sink is attached to the vertical cavity surface emitting laser diode within 5 μm of the lower reflector.
Claim 5
Dependent Claim
23 words
The vertical cavity surface emitting laser diode of claim 2 wherein the active layer is less than 10 μm from the heat sink.
Claim 6
Dependent Claim
39 words
The vertical cavity surface emitting laser diode of claim 1 wherein the wafer bonded interface is ohmic and of low resistance, the transparent substrate is conductive, and at least a first contact is made directly to the transparent substrate.
Claim 7
Dependent Claim
30 words
The vertical cavity surface emitting laser diode of claim 5 wherein a second contact is made directly to the lower reflector, the second contact having a solid, non-annular geometric shape.
Claim 8
Dependent Claim
25 words
The vertical cavity surface emitting laser diode of claim 1 wherein patterned regions for optical confinement are placed within 2 μm of the wafer bond.
Claim 9
Dependent Claim
36 words
The vertical cavity surface emitting laser diode of claim 5 wherein patterned regions to effect one of optical and current confinement are placed within the diode structure no further than 2 μm from the wafer bond.
Claim 10
Dependent Claim
25 words
The vertical cavity surface emitting laser diode of claim 1 wherein additional reflective layers are placed between the transparent substrate and the wafer bonded interface.
Claim 11
Dependent Claim
38 words
The vertical cavity surface emitting laser diode of claim 9 wherein patterned regions to effect at least one of optical and current confinement are placed within the device structure no more than 2 μm from the wafer bond.
Claim 12
Dependent Claim
33 words
The vertical cavity surface emitting laser diode of claim 1 wherein at least a part of an exterior surface of the transparent substrate is shaped to redirect the light in a preferred direction.
Claim 13
Dependent Claim
31 words
The vertical cavity surface emitting laser diode of claim 1 wherein at least one additional optoelectronic component is mounted on an exposed surface of the vertical cavity surface emitting laser diode.
Claim 14
Dependent Claim
18 words
The vertical cavity surface emitting laser diode of claim 12 wherein the additional optoelectronic component is a photodetector.
Claim 15
Dependent Claim
17 words
The vertical cavity surface emitting laser diode of claim 10 wherein the mounting method comprises wafer bonding.
Claim 16
Dependent Claim
163 words
An array of vertical cavity surface emitting lasers comprised of a plurality of individual vertical cavity surface emitting lasers, each individual vertical cavity surface emitting laser comprising: a p-n junction active layer, a first exposed surface of the active layer comprising a p-type semiconductor and a second exposed surface of the active layer comprising an n-type semiconductor; a p-type distributed Bragg reflector adjacent to and covering the exposed p-type semiconductor surface of the active layer and lattice matched to it; and an n-type distributed Bragg reflector adjacent to and covering the exposed n-type semiconductor surface of the active layer and lattice matched to it; a single conductive substrate comprising one of n-type and p-type semiconductor, the single substrate being wafer bonded to the distributed Bragg reflectors of each individual vertical cavity surface emitting laser having the same semiconductor type as the substrate, the wafer bonded interface being ohmic and low resistance, permitting all the lasers to be electrically coupled to the same substrate.
Claim 17
Dependent Claim
163 words
An array of vertical cavity surface emitting lasers comprised of a plurality of individual vertical cavity surface emitting lasers, each individual vertical cavity surface emitting laser comprising: a p-n junction active layer, a first exposed surface of the active layer comprising a p-type semiconductor and a second exposed surface of the active layer comprising an n-type semiconductor; a p-type distributed Bragg reflector adjacent to and covering the exposed p-type semiconductor surface of the active layer and lattice matched to it; and an n-type distributed Bragg reflector adjacent to and covering the exposed n-type semiconductor surface of the active layer and lattice matched to it; a single conductive substrate comprising one of n-type and p-type semiconductor, the single substrate being wafer bonded to the distributed Bragg reflectors of each individual vertical cavity surface emitting laser having the same semiconductor type as the substrate, the wafer bonded interface being ohmic and low resistance, permitting all the lasers to be electrically coupled to the same substrate.
Claim 18
Dependent Claim
78 words
A vertical cavity surface emitting laser diode comprising: an active layer having an upper and lower surface; upper and lower distributed Bragg reflectors on top and below the active layer and adjacent to the upper and lower surfaces; a wafer bonded interface within at least one of the distributed Bragg reflectors; contacts for applying a voltage across the active layer; and patterned regions within 2 μm of the wafer bond to effect one of optical and current confinement.
Claim 19
Dependent Claim
78 words
A vertical cavity surface emitting laser diode comprising: an active layer having an upper and lower surface; upper and lower distributed Bragg reflectors on top and below the active layer and adjacent to the upper and lower surfaces; a wafer bonded interface within at least one of the distributed Bragg reflectors; contacts for applying a voltage across the active layer; and patterned regions within 2 μm of the wafer bond to effect one of optical and current confinement.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2001-03-02 | 2001-09-01 | 2002-03-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-03-02 | 2005-09-01 | 2006-03-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-03-02 | 2009-09-01 | 2010-03-03 | $7700.00 | Window Closed / Lapsed |