US5721703A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Reprogrammable option select circuit
Assignee: Micron Technology Inc
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Filing: 1996-04-29
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Granted: 1998-02-24
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Expires: 2016-04-29
Abstract
Abstract An integrated circuit package includes an integrated circuit device that operates in more than one operational mode. The operational mode of the integrated circuit device is controlled by a mode select input. Examples of operational modes include fast page and block modes, two- and three-latency modes, and normal and test modes. A reprogrammable mode select circuit within the integrated circuit package produces a mode control signal that drives a mode select input of the integrated circuit device. The operational mode of the integrated circuit device then corresponds to the state of the mode select signal.
Inventors
- 👤 Daryl L. Habersetzer
- 👤 Casey R. Kurth
- 👤 Patrick J. Mullarkey
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 06:22
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/10; G11C7/1015; G11C7/1045; G11C16/00; G11C16/02; G11C16/06; G11C16/10; G11C16/20
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
293 words
A reprogrammable mode select circuit within an integrated circuit package containing an integrated volatile device having a control part, the volatile device being responsive to operate in a first operational mode in response to a first mode select signal and to operate in a second operational mode in response to a second mode select signal, comprising: a first node adapted to be coupled to a supply voltage; a second node; a reference node for providing a reference voltage; a first circuit portion coupled between the second node and the reference node, the first circuit portion including an electrically erasable, reprogrammable, nonvolatile cell, the reprogrammable cell retaining the programmed state when power is removed including: an input coupled to the reference node; an output coupled to the second node; and a programming input adapted to receive a programming signal, the reprogrammable cell being programmable to either a first state or a second state, the reprogrammable cell in the first state coupling a selected signal from the input to the output and in the second state blocking the selected signal from the input to the output; and a second circuit portion coupled between the second node and the first node, the second circuit portion having a mode output coupled to the mode select input, the second circuit portion being responsive to supply the first mode select signal to the mode output in response to the reference potential at the second node and to provide the second mode select signal in response to the supply voltage at the second node, wherein the second circuit portion includes a latch circuit, the latch circuit including a NAND gate having one input coupled to the second node, the NAND gate further including an output coupled to the mode output.
Claim 2
Dependent Claim
293 words
A reprogrammable mode select circuit within an integrated circuit package containing an integrated volatile device having a control part, the volatile device being responsive to operate in a first operational mode in response to a first mode select signal and to operate in a second operational mode in response to a second mode select signal, comprising: a first node adapted to be coupled to a supply voltage; a second node; a reference node for providing a reference voltage; a first circuit portion coupled between the second node and the reference node, the first circuit portion including an electrically erasable, reprogrammable, nonvolatile cell, the reprogrammable cell retaining the programmed state when power is removed including: an input coupled to the reference node; an output coupled to the second node; and a programming input adapted to receive a programming signal, the reprogrammable cell being programmable to either a first state or a second state, the reprogrammable cell in the first state coupling a selected signal from the input to the output and in the second state blocking the selected signal from the input to the output; and a second circuit portion coupled between the second node and the first node, the second circuit portion having a mode output coupled to the mode select input, the second circuit portion being responsive to supply the first mode select signal to the mode output in response to the reference potential at the second node and to provide the second mode select signal in response to the supply voltage at the second node, wherein the second circuit portion includes a latch circuit, the latch circuit including a NAND gate having one input coupled to the second node, the NAND gate further including an output coupled to the mode output.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-02-23 | 2001-08-25 | 2002-02-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-02-23 | 2005-08-25 | 2006-02-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-02-23 | 2009-08-25 | 2010-02-24 | $7700.00 | Window Closed / Lapsed |