Method and device for uniforming luminosity and reducing phosphor degradation of a field emission flat display

Claim 2

Field emission display (FED) comprising a cathodic structure in the form of conductive strips defined on a dielectric substrate and having field stimulable electron emission sites distributed over their surface, each strip being individually biasable in sequence by a column scanning circuitry of a pixel driving matrix of the display, which driving matrix comprises conductive extractor strips orthogonal to said columns, selectable in sequence by a row selection circuitry, characterized in that said column scanning circuitry comprises a correction memory array programmable during a testing phase of the display capable of storing relative emission efficiency values of each individual pixel of the display and biunivocally addressable with the relative excited pixel during the functioning of the display; a correction circuit of a column driving signal capable of modulating the bias of the selected column as a function of a video signal and of the values stored in said correction memory for each selected pixel.

Claim 3

The field emission display FED as defined in claim 1, characterized in that said correction memory is an array of nonvolatile memory cells of a type belonging to the group composed of EPROM, OTP and FLASH-EPROM.

Claim 4

The field emission display (FED) as defined in claim 1, characterized in that said correction memory is electrically alterable and selected from the group composed of EEPROM, RAM and SRAM and is capable of storing values of relative emission efficiency of each pixel of the display at power-on.

Claim 5

The field emission display (FED) as defined in claim 2, characterized in that each value of relative emission efficiency of individual pixels is stored as a four bits digital word.

Claim 6

The field emission display (FED) as defined in claim 1, characterized in that the values of relative emission efficiency and said correction memory array are of the analog type.

Claim 7

The field emission display (FED) as defined in claim 1, characterized in that said values of relative emission efficiency of individual pixels of the display represent the relative emission efficiency of the cathodic structure alone of the display.

Claim 8

The field emission display (FED) as defined in claim 1, characterized in that said values of relative emission efficiency of individual pixels of the display represent the overall relative emission efficiency of the cathodic structure and of an anodic structure of the display.

Claim 9

The field emission display (FED) according to claim 6, characterized in that it comprises a logic circuit capable of sequentially stimulating each row of the display with a constant biasing signal, of reading the value of the current through each column driving stage and generating a value of relative emission efficiency of each pixel to be stored in said correction memory at each powering-on of the display.

Claim 10

The field emission display (FED) according to claims 1, characterized in that said correction memory has said correction values organized in a matrix of rows and columns similarly to the pixels of said drive matrix display and a correction circuit for each column.

Claim 11

The field emission display (FED) as defined in claim 9, characterized in that said correction memory is a device chosen from the group composed of CCD and EEPROM arrays.

Claim 12

A field emission display (FED) comprising a cathodic structure in the form of conductive strips defined on a dielectric substrate and having field stimulable electron emission sites distributed over their surface, each strip being individually biasable in sequence by a column scanning circuitry of a pixel driving matrix of the display, which driving matrix comprises conductive extractor strips orthogonal to said columns, selectable in sequence by a row selection circuitry, characterized in that it comprises a first nonvolatile memory capable of storing values of relative emission efficiency of each pixel reflecting a compound emission efficiency of the cathodic and anodic structure of the display as measured during a testing of the device; a logic circuit capable of sequentially stimulating each row with a constant biasing signal, reading the value of the current through each column driving stage, generating a value of relative emission efficiency of the cathodic structure alone for each pixel, and combining said value with the corresponding value stored in said first nonvolatile correction memory; at least a second electrically alterable memory, capable of storing said combined value of relative efficiency of each pixel when turning-on the display; said second memory storing a matrix of correction values that are read at every screen refreshing.

Claim 13

A field emission display (FED) comprising a cathodic structure in the form of conductive strips defined on a dielectric substrate and having field stimulable electron emission sites distributed over their surface, each strip being individually biasable in sequence by a column scanning circuitry of a pixel driving matrix of the display, which driving matrix comprises conductive extractor strips orthogonal to said columns, selectable in sequence by a row selection circuitry, characterized in that it comprises a first nonvolatile memory capable of storing values of relative emission efficiency of each pixel reflecting a compound emission efficiency of the cathodic and anodic structure of the display as measured during a testing of the device; a logic circuit capable of sequentially stimulating each row with a constant biasing signal, reading the value of the current through each column driving stage, generating a value of relative emission efficiency of the cathodic structure alone for each pixel, and combining said value with the corresponding value stored in said first nonvolatile correction memory; at least a second electrically alterable memory, capable of storing said combined value of relative efficiency of each pixel when turning-on the display; said second memory storing a matrix of correction values that are read at every screen refreshing.

Claim 14

The field emission display (FED) according to claim 11, characterized in that said first correction memory is chosen from the group composed of EPROM, OTP and FLASH-EPROM and said second memory is chosen from the group composed of EEPROM, RAM and SRAM.

Claim 17

The method according to claim 13, characterized in that the value of the relative emission efficiency of each pixel is determined and stored during testing of the display.

Claim 18

The method according to claim 13, characterized in that said value for each individual pixel represents the relative emission efficiency exclusively of a cathode structure of the display's pixel.

Claim 19

The method according to claim 13, characterized in that said value also includes a component due to a respective anodic structure of the display's pixel.

Claim 20

The method according to claim 15, characterized in that said value at each pixel is determined and stored at each turning-on of the display.

Claim 21

The method according to claim 13, characterized in that comprises determining and storing a first value representative of a relative emission efficiency of each pixel by detecting and measuring the light emitted by a selectively excited pixel during a testing phase of the display; determining a second value representative of the relative emission efficiency of the cathodic structure of each pixel, combining this second value with the corresponding first value stored during the testing phase of the display, and storing a third resultant value for each pixel in a correction memory, during a preoperative phase at each turning-on of the display; modulating the bias of each selected pixel in functioning of a video signal and of a correction signal corresponding to said stored resultant value, during the operation of the display.

Claim 22

A field emission display (FED) system comprising: a cathodic structure having individually selectable columns comprised of conductive strips defined on a dielectric substrate and field stimulable electron emission sites distributed on a surface of said strips; conductive extractor strips forming rows orthogonal to said columns; a pixel driving matrix connected to bias individual ones of said columns and rows to stimulate selected ones of said sites; a correction memory array programmable during a testing phase of the display capable of storing relative emission efficiency values of each individual pixel of the display; a correction circuit connected to receive a video signal and the value of a memory cell which corresponds to said video signal, and connected to provide said pixel driving matrix with a column driving signal derived from said value and said video signal; wherein said testing phase is entered when said display is powered on.

Claim 23

A field emission display (FED) system comprising: a cathodic structure having individually selectable columns comprised of conductive strips defined on a dielectric substrate and field stimulable electron emission sites distributed on a surface of said strips; conductive extractor strips forming rows orthogonal to said columns; a pixel driving matrix connected to bias individual ones of said columns and rows to stimulate selected ones of said sites; a correction memory array programmable during a testing phase of the display capable of storing relative emission efficiency values of each individual pixel of the display; a correction circuit connected to receive a video signal and the value of a memory cell which corresponds to said video signal, and connected to provide said pixel driving matrix with a column driving signal derived from said value and said video signal; wherein said testing phase is entered when said display is powered on.

Claim 24

The FED system of claim 19, wherein said correction memory array is a FLASH-EPROM memory.

Claim 25

The FED system of claim 20, wherein each value of relative emission efficiency of individual pixels is stored as a four bit digital word.

Claim 26

The FED system of claim 19, wherein said correction memory is electrically alterable and is capable of storing values of relative emission efficiency of each pixel of the display at power-on.

Claim 27

The FED system of claim 19, wherein the values of relative emission efficiency and said correction memory array are of the analog type.

Claim 28

The FED system of claim 19, wherein said values of relative emission efficiency of individual pixels of the display represent the relative emission efficiency of the cathodic structure alone of the display.

Claim 29

The FED system of claim 19, wherein said values of relative emission efficiency of individual pixels of the display represent the overall relative emission efficiency of the cathodic structure and of an anodic structure of the display.

Claim 30

A field emission display (FED) system comprising: a cathodic structure having individually selectable columns comprised of conductive strips defined on a dielectric substrate and field stimulable electron emission sites distributed on a surface of said strips; conductive extractor strips forming rows orthogonal to said columns; a pixel driving matrix connected to bias individual ones of said columns and rows to stimulate selected ones of said sites; a correction memory array programmable during a testing phase of the display capable of storing relative emission efficiency values of each individual pixel of the display; a correction circuit connected to receive a video signal and the value of a memory cell which corresponds to said video signal, and connected to provide said pixel driving matrix with a column driving signal derived from said value and said video signal; wherein said testing phase is entered periodically during use of said display.

Claim 31

A field emission display (FED) system comprising: a cathodic structure having individually selectable columns comprised of conductive strips defined on a dielectric substrate and field stimulable electron emission sites distributed on a surface of said strips; conductive extractor strips forming rows orthogonal to said columns; a pixel driving matrix connected to bias individual ones of said columns and rows to stimulate selected ones of said sites; a correction memory array programmable during a testing phase of the display capable of storing relative emission efficiency values of each individual pixel of the display; a correction circuit connected to receive a video signal and the value of a memory cell which corresponds to said video signal, and connected to provide said pixel driving matrix with a column driving signal derived from said value and said video signal; wherein said testing phase is entered periodically during use of said display.

Claim 32

The FED system of claim 26, wherein said correction memory array is a FLASH-EPROM memory.

Claim 33

The FED system of claim 27, wherein each value of relative emission efficiency of individual pixels is stored as a four bit digital word.

Claim 34

The FED system of claim 26, wherein said correction memory is electrically alterable and is capable of storing values of relative emission efficiency of each pixel of the display at power-on.

Claim 35

The FED system of claim 26, wherein the values of relative emission efficiency and said correction memory array are of the analog type.

Claim 36

The FED system of claim 26, wherein said values of relative emission efficiency of individual pixels of the display represent the relative emission efficiency of the cathodic structure alone of the display.

Claim 37

The FED system of claim 26, wherein said values of relative emission efficiency of individual pixels of the display represent the overall relative emission efficiency of the cathodic structure and of an anodic structure of the display.

Claim 38

A field emission display (FED) system comprising: a cathodic structure having individually selectable columns comprised of conductive strips defined on a dielectric substrate and field stimulable electron emission sites distributed on a surface of said strips; conductive extractor strips forming rows orthogonal to said columns; a pixel driving matrix connected to bias individual ones of said columns and rows to stimulate selected ones of said sites; a correction memory array programmable during a testing phase of the display capable of storing the current ouput of each individual pixel of the display; a correction circuit connected to receive a video signal and the value of a memory cell which corresponds to said video signal, and connected to provide said pixel driving matrix with a column driving signal derived from said value and said video signal; wherein said testing phase is entered when said display is powered on.

Claim 39

A field emission display (FED) system comprising: a cathodic structure having individually selectable columns comprised of conductive strips defined on a dielectric substrate and field stimulable electron emission sites distributed on a surface of said strips; conductive extractor strips forming rows orthogonal to said columns; a pixel driving matrix connected to bias individual ones of said columns and rows to stimulate selected ones of said sites; a correction memory array programmable during a testing phase of the display capable of storing the current ouput of each individual pixel of the display; a correction circuit connected to receive a video signal and the value of a memory cell which corresponds to said video signal, and connected to provide said pixel driving matrix with a column driving signal derived from said value and said video signal; wherein said testing phase is entered when said display is powered on.

Claim 40

The FED system of claim 33, wherein said correction memory array is a FLASH-EPROM memory.

Claim 41

The FED system of claim 34, wherein each value of relative emission efficiency of individual pixels is stored as a four bit digital word.

Claim 42

The FED system of claim 33, wherein said correction memory is electrically alterable and is capable of storing values of relative emission efficiency of each pixel of the display at power-on.

Claim 43

The FED system of claim 33, wherein the values of relative emission efficiency and said correction memory array are of the analog type.

Claim 44

The FED system of claim 33, wherein said values of relative emission efficiency of individual pixels of the display represent the relative emission efficiency of the cathodic structure alone of the display.

Claim 45

The FED system of claim 33, wherein said values of relative emission efficiency of individual pixels of the display represent the overall relative emission efficiency of the cathodic structure and of an anodic structure of the display.

Claim 46

A field emission display (FED) system comprising: a cathodic structure having individually selectable columns comprised of conductive strips defined on a dielectric substrate and field stimulable electron emission sites distributed on a surface of said strips; conductive extractor strips forming rows orthogonal to said columns; a pixel driving matrix connected to bias individual ones of said columns and rows to stimulate selected ones of said sites; a non-volatile first correction memory array containing values corresponding to emission efficiency values of each individual pixel of the display as determined at time of manufacture; a volatile second correction memory array programmable periodically during a test phase of the display capable of storing relative emission efficiency values of each individual pixel of the display as determined at the time of each testing; a correction circuit connected to receive a video signal and the value of a memory cell of each of said memories which corresponds to said video signal, and connected to provide said pixel driving matrix with a column driving signal derived from said value and said video signal; wherein said testing phase is entered when said display is powered on.

Claim 47

A field emission display (FED) system comprising: a cathodic structure having individually selectable columns comprised of conductive strips defined on a dielectric substrate and field stimulable electron emission sites distributed on a surface of said strips; conductive extractor strips forming rows orthogonal to said columns; a pixel driving matrix connected to bias individual ones of said columns and rows to stimulate selected ones of said sites; a non-volatile first correction memory array containing values corresponding to emission efficiency values of each individual pixel of the display as determined at time of manufacture; a volatile second correction memory array programmable periodically during a test phase of the display capable of storing relative emission efficiency values of each individual pixel of the display as determined at the time of each testing; a correction circuit connected to receive a video signal and the value of a memory cell of each of said memories which corresponds to said video signal, and connected to provide said pixel driving matrix with a column driving signal derived from said value and said video signal; wherein said testing phase is entered when said display is powered on.

Claim 48

The FED system of claim 40, wherein said correction memory array is a FLASH-EPROM memory.

Claim 49

The FED system of claim 41, wherein each value of relative emission efficiency of individual pixels is stored as a four bit digital word.

Claim 50

The FED system of claim 40, wherein said correction memory is electrically alterable and is capable of storing values of relative emission efficiency of each pixel of the display at power-on.

Claim 51

The FED system of claim 40, wherein the values of relative emission efficiency and said correction memory array are of the analog type.

Claim 52

The FED system of claim 40, wherein said values of relative emission efficiency of individual pixels of the display represent the relative emission efficiency of the cathodic structure alone of the display.

Claim 53

The FED system of claim 40, wherein said values of relative emission efficiency of individual pixels of the display represent the overall relative emission efficiency of the cathodic structure and of an anodic structure of the display.