Abstract A balanced-to-unbalanced converting circuit in which balanced-to-unbalanced converters are formed by a stripline in such a manner as to include a copper foil pattern which is formed on an inner or surface printed circuit layer of a multi-layer substrate and are connected to a double balanced mixer serving as a surface-mounted component provided on a first printed circuit. In the case of this converting circuit, a part of conventional surface-mounted components are eliminated from the multi-layer substrate. Thereby, the high density packaging of other surface-mounted components can be achieved. This contributes to the miniaturization, thickness reduction, weight reduction and price reduction of an entire portable telephone. Further, the balanced-to-unbalanced converters are formed by placing the copper foil pattern on a printed circuit layer which is sandwiched between grounded conductor layers of the multi-layer substrate. Thereby, the electrical connection between the balanced-to-unbalanced converters and the interference therebetween can be reduced. Consequently, the performance of the circuit can be improved.
A balanced-to-unbalanced converting circuit comprising: a multi-layered substrate including an outermost printed circuit layer, a first grounded conductor layer and a second printed circuit layer sandwiched such that the first grounded conductor layer is located between the outermost printed circuit layer and the second printed circuit layer; a balanced circuit mounted on the outermost printed circuit layer; an unbalanced circuit mounted on the outermost printed circuit layer; and a balanced-to-unbalanced converter connected between the balanced circuit and the unbalanced circuit; wherein the balanced-to-unbalanced converter includes a stripline formed by a foil pattern formed on the second printed circuit layer, and by the first grounded conductor layer; and wherein the foil pattern is connected to the balanced circuit and the unbalanced circuit through openings formed in the first grounded conductor layer.
Claim 2
Dependent Claim
130 words
A balanced-to-unbalanced converting circuit comprising: a multi-layered substrate including an outermost printed circuit layer, a first grounded conductor layer and a second printed circuit layer sandwiched such that the first grounded conductor layer is located between the outermost printed circuit layer and the second printed circuit layer; a balanced circuit mounted on the outermost printed circuit layer; an unbalanced circuit mounted on the outermost printed circuit layer; and a balanced-to-unbalanced converter connected between the balanced circuit and the unbalanced circuit; wherein the balanced-to-unbalanced converter includes a stripline formed by a foil pattern formed on the second printed circuit layer, and by the first grounded conductor layer; and wherein the foil pattern is connected to the balanced circuit and the unbalanced circuit through openings formed in the first grounded conductor layer.
Claim 3
Dependent Claim
58 words
The balanced-to-unbalanced converting circuit according to claim 1, further comprising: a second balanced-to-unbalanced converter including a second stripline formed by a second foil pattern formed on the second printed circuit layer, and the first grounded conductor layer; wherein the second foil pattern is connected to the balanced circuit through second openings formed in the first grounded conductor layer.
Claim 4
Dependent Claim
98 words
The balanced-to-unbalanced converting circuit according to claim 1, further comprising: a second grounded conductor layer and a third printed circuit layer such that the second grounded conductor layer is located between the second and third printed circuit layers; a second balanced-to-unbalanced converter including a second stripline formed by a second foil pattern formed on the third printed circuit layer, and by the second grounded conductor layer; wherein the second foil pattern is connected to the balanced circuit through second openings formed in the first grounded conductor layer, the second printed circuit layer, and the second grounded conductor layer.