Display control method and apparatus for performing high-quality display free from noise lines

Claim 2

A display control apparatus for controlling a flat panel display with a frame cycle including a display period for a plurality of lines and a vertical blank period for at least two lines following the display period, said flat panel display being constituted by two display panels respectively corresponding to upper and lower halves of a screen, and said panels being simultaneously controlled in the frame cycle, comprising: video data transfer means for sequentially transferring video data for a plurality of lines from a display start line to a display final line of said flat panel display to a line buffer of said flat panel display during the display period; and means for setting contents of said line buffer during the vertical blank period immediately after the display final line to be the same as video data of the display final line.

Claim 3

The apparatus according to claim 1, further comprising means for setting contents of said line buffer during the vertical blank period immediately before the next frame cycle to be the same as video data to be displayed on the display start line in the next frame cycle.

Claim 4

The apparatus according to claim 1, wherein said means for setting the contents of said line buffer to be the same as the video data of the display final line comprises video data re-transfer means for re-transferring the same video data as the video data of the display final line transferred by said video data transfer means to said line buffer of said flat panel display.

Claim 5

The apparatus according to claim 3, wherein said video data re-transfer means comprises means for repetitively reading out the video data of the display final line twice from a video memory which stores data for at least one frame.

Claim 6

The apparatus according to claim 3, wherein said video data re-transfer means comprises means for reading out the video data of the display final line from a video memory which stores data for at least one frame, a buffer for holding the video data of the display final line read out from said video memory, and means for re-transferring the video data of the display final line from said buffer.

Claim 7

A display control apparatus for controlling a flat panel display with a frame cycle including a display period for a plurality of lines and a vertical blank period for at least two lines following the display period, said flat panel display being constituted by two display panels respectively corresponding to upper and lower halves of a screen, and said panels being simultaneously controlled in the frame cycle, comprising: video data transfer means for sequentially transferring video data for a plurality of lines from a display start line to a display final line of said flat panel display to a line buffer of said flat panel display during the display period; shift clock supply means for supplying a shift clock for causing said line buffer to fetch the video data to said flat panel display in synchronism with the video data transferred from said video data transfer means; and means for stopping supply of the shift clock from said shift clock supply means to said flat panel display during the vertical blank period immediately after the display final line so that the video data of the display final line is held in said line buffer during the vertical blank period immediately after the display final line.

Claim 8

A display control apparatus for controlling a flat panel display with a frame cycle including a display period for a plurality of lines and a vertical blank period for at least two lines following the display period, said flat panel display being constituted by two display panels respectively corresponding to upper and lower halves of a screen, and said panels being simultaneously controlled in the frame cycle, comprising: video data transfer means for sequentially transferring video data for a plurality of lines from a display start line to a display final line of said flat panel display to a line buffer of said flat panel display during the display period; shift clock supply means for supplying a shift clock for causing said line buffer to fetch the video data to said flat panel display in synchronism with the video data transferred from said video data transfer means; and means for stopping supply of the shift clock from said shift clock supply means to said flat panel display during the vertical blank period immediately after the display final line so that the video data of the display final line is held in said line buffer during the vertical blank period immediately after the display final line.

Claim 9

The apparatus according to claim 6, further comprising means for setting contents of said line buffer during the vertical blank period immediately before the next frame cycle to be the same as video data to be displayed on the display start line in the next frame cycle.

Claim 10

The apparatus according to claim 6, wherein said means for setting the contents of said line buffer to be the same as the video data to be displayed on the display start line in the next frame cycle comprises means for reading out in advance video data to be transferred to the display start line from a video memory which stores data for at least one frame, and transferring the readout video data to said line buffer of said flat panel display.