US5691780A
Expired / Lapsed
US
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Phase error control for color wheel
Assignee: Texas Instruments Inc
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Filing: 1995-06-13
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Granted: 1997-11-25
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Expires: 2015-06-13
Abstract
Abstract A motor control unit (15c) for synchronizing a color wheel (15) to an incoming video signal and for re-synchronizing the color wheel after a channel change. The motor control unit (15c) has an error control unit (31), which detects an out-of-phase condition, and derives a color wheel sync signal from the pixel sample clock adjusted by any phase error. A drive unit (33) phase locks this sync signal to an index signal provided by the color wheel. The result is a tightly controlled re-synchronization that minimizes perceived effects.
Inventors
- 👤 Stephen W. Marshall
- 👤 Donald Hicks
- 👤 William R. Breithaupt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 16:09
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/02; H; H04; H04N; H04N9/00; H04N9/12; H04N9/31; H04N9/3102; H04N9/312; H04N9/3111; H04N9/3114
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
171 words
A method of providing a color wheel sync signal for synchronizing a color wheel to an incoming video signal, where said video signal has been sampled with a pixel clock and converted from a series of interlaced fields to a series of frames separated in accordance with a vertical sync signal, and where said color wheel generates at least one index signal per revolution, comprising the steps of: receiving an input signal that causes a potential phase difference between said vertical sync signal and one of said index signal and said color wheel sync signal; comparing said one of said index signal and said color wheel sync signal said vertical sync signal; thereby providing a phase error value; dividing said pixel clock by one-fourth the number of pixels per line, thereby providing a divided pixel clock signal; adding said phase error value to the number of lines in two frames; and dividing said divided pixel clock signal by the result of said adding step, thereby providing said color wheel sync signal.
Claim 2
Independent Claim
171 words
A method of providing a color wheel sync signal for synchronizing a color wheel to an incoming video signal, where said video signal has been sampled with a pixel clock and converted from a series of interlaced fields to a series of frames separated in accordance with a vertical sync signal, and where said color wheel generates at least one index signal per revolution, comprising the steps of: receiving an input signal that causes a potential phase difference between said vertical sync signal and one of said index signal and said color wheel sync signal; comparing said one of said index signal and said color wheel sync signal said vertical sync signal; thereby providing a phase error value; dividing said pixel clock by one-fourth the number of pixels per line, thereby providing a divided pixel clock signal; adding said phase error value to the number of lines in two frames; and dividing said divided pixel clock signal by the result of said adding step, thereby providing said color wheel sync signal.
Claim 3
Dependent Claim
15 words
The method of claim 1, wherein said phase error value is -1, 0, or 1.
Claim 4
Dependent Claim
34 words
The method of claim 1, wherein said color wheel sync signal is constrained to a range of rates by fixing the most significant bits during said step of dividing said divided pixel clock signal.
Claim 5
Independent Claim
166 words
A method of providing a color wheel sync signal for synchronizing a color wheel to an incoming video signal, where said video signal has been sampled with a pixel clock and consists of a series of frames separated in accordance with a vertical sync signal, and where said color wheel generates at least one index signal per revolution, comprising the steps of: receiving an input signal that causes a potential phase difference between said vertical sync signal and one of said index signal and said color wheel sync signal; comparing said one of said index signal and said color wheel sync signal to said vertical sync signal, thereby providing a phase error value; dividing said pixel clock by one-half the number of pixels per line, thereby providing a divided pixel clock signal; adding said phase error value to the number of lines in one frames; and dividing said divided pixel clock signal by the result of said adding step, thereby providing said color wheel sync signal.
Claim 6
Independent Claim
166 words
A method of providing a color wheel sync signal for synchronizing a color wheel to an incoming video signal, where said video signal has been sampled with a pixel clock and consists of a series of frames separated in accordance with a vertical sync signal, and where said color wheel generates at least one index signal per revolution, comprising the steps of: receiving an input signal that causes a potential phase difference between said vertical sync signal and one of said index signal and said color wheel sync signal; comparing said one of said index signal and said color wheel sync signal to said vertical sync signal, thereby providing a phase error value; dividing said pixel clock by one-half the number of pixels per line, thereby providing a divided pixel clock signal; adding said phase error value to the number of lines in one frames; and dividing said divided pixel clock signal by the result of said adding step, thereby providing said color wheel sync signal.
Claim 7
Independent Claim
163 words
A method of providing a color wheel sync signal for synchronizing a color wheel to an incoming video signal, where said video signal has been sampled with a pixel clock and consists of a series of frames separated in accordance with a vertical sync signal, and where said color wheel generates at least one index signal per revolution, comprising the steps of: receiving an input signal that causes a potential phase difference between said vertical sync signal and one of said index signal and said color wheel sync signal; comparing said one of index signal and said color wheel sync signal to said vertical sync signal, thereby providing a phase error value; dividing said pixel clock by the number of pixels per line, thereby providing_a divided pixel clock signal; adding said phase error value to the number of lines in one field; and dividing said divided pixel clock signal by the result of said adding step, thereby providing said color wheel sync signal.
Claim 8
Independent Claim
163 words
A method of providing a color wheel sync signal for synchronizing a color wheel to an incoming video signal, where said video signal has been sampled with a pixel clock and consists of a series of frames separated in accordance with a vertical sync signal, and where said color wheel generates at least one index signal per revolution, comprising the steps of: receiving an input signal that causes a potential phase difference between said vertical sync signal and one of said index signal and said color wheel sync signal; comparing said one of index signal and said color wheel sync signal to said vertical sync signal, thereby providing a phase error value; dividing said pixel clock by the number of pixels per line, thereby providing_a divided pixel clock signal; adding said phase error value to the number of lines in one field; and dividing said divided pixel clock signal by the result of said adding step, thereby providing said color wheel sync signal.
Claim 9
Dependent Claim
15 words
The method of claim 4, wherein said phase error value is -1, 0, or 1.
Claim 10
Dependent Claim
34 words
The method of claim 4, wherein said color wheel sync signal is constrained to a range of rates by fixing the most significant bits during said step of dividing said divided pixel clock signal.
Claim 11
Dependent Claim
204 words
A phase error control unit for providing a color wheel sync signal for a color wheel in a display system that samples an incoming video signal with a pixel clock and converts the sampled signal from a series of interlaced fields to a series of frames separated in accordance with a vertical sync signal, and where said color wheel generates an index signal once per revolution, comprising: an input signal that causes said incoming video signal to be switched such that a potential phase difference occurs between said vertical sync signal and one of said index signal and said color wheel sync signal; a phase comparator for comparing one of said index signal and said color wheel sync signal to said vertical sync signal, thereby providing a phase error value; an adder for receiving said phase error value from said phase comparator and for adding said phase error value to a value representing twice the number of lines per frame; a first divide-by-N divider for dividing said pixel clock by one-fourth the number of pixels per line; and a second divide-by-N divider for dividing the output of said first divide-by-N counter by the output of said adder, thereby providing said color wheel sync signal.
Claim 12
Dependent Claim
204 words
A phase error control unit for providing a color wheel sync signal for a color wheel in a display system that samples an incoming video signal with a pixel clock and converts the sampled signal from a series of interlaced fields to a series of frames separated in accordance with a vertical sync signal, and where said color wheel generates an index signal once per revolution, comprising: an input signal that causes said incoming video signal to be switched such that a potential phase difference occurs between said vertical sync signal and one of said index signal and said color wheel sync signal; a phase comparator for comparing one of said index signal and said color wheel sync signal to said vertical sync signal, thereby providing a phase error value; an adder for receiving said phase error value from said phase comparator and for adding said phase error value to a value representing twice the number of lines per frame; a first divide-by-N divider for dividing said pixel clock by one-fourth the number of pixels per line; and a second divide-by-N divider for dividing the output of said first divide-by-N counter by the output of said adder, thereby providing said color wheel sync signal.
Claim 13
Dependent Claim
25 words
The error control unit of claim 8, further comprising a ratio counter for counting said number of lines per frame for input to said adder.
Claim 14
Dependent Claim
193 words
A phase error control unit for providing a color wheel sync signal for a color wheel in a display system that samples an incoming video signal with a pixel clock to provide a series of frames separated in accordance with a vertical sync signal, and where said color wheel generates an index signal once per revolution, comprising: an input signal that causes said incoming video signal to be switched such that a potential phase difference occurs between said vertical sync signal and one of said index signal and said color wheel sync signal; a phase comparator for comparing one of said index signal and said color wheel sync signal to said vertical sync signal, thereby providing a phase error value; an adder for receiving said phase error value from said phase comparator and for adding said phase error value to a value representing the number of lines per frame; a first divide-by-N divider for dividing said pixel clock by one-half the number of pixels per line; and a second divide-by-N divider for dividing the output of said first divide-by-N counter by the output of said adder, thereby providing said color wheel sync signal.
Claim 15
Dependent Claim
193 words
A phase error control unit for providing a color wheel sync signal for a color wheel in a display system that samples an incoming video signal with a pixel clock to provide a series of frames separated in accordance with a vertical sync signal, and where said color wheel generates an index signal once per revolution, comprising: an input signal that causes said incoming video signal to be switched such that a potential phase difference occurs between said vertical sync signal and one of said index signal and said color wheel sync signal; a phase comparator for comparing one of said index signal and said color wheel sync signal to said vertical sync signal, thereby providing a phase error value; an adder for receiving said phase error value from said phase comparator and for adding said phase error value to a value representing the number of lines per frame; a first divide-by-N divider for dividing said pixel clock by one-half the number of pixels per line; and a second divide-by-N divider for dividing the output of said first divide-by-N counter by the output of said adder, thereby providing said color wheel sync signal.
Claim 16
Dependent Claim
25 words
The error control unit of claim 10, further comprising a ratio counter for counting said number of lines per frame for input to said adder.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-11-24 | 2001-05-26 | 2001-11-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-11-24 | 2005-05-26 | 2005-11-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-11-24 | 2009-05-26 | 2009-11-25 | $7700.00 | Window Closed / Lapsed |