← Back to Patent Explorer
US5684974A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and apparatus for controlling reconfiguration of storage-device memory areas

Assignee: Hitachi Ltd
•
Filing: 1995-03-13
•
Granted: 1997-11-04
•
Expires: 2015-03-13
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An apparatus and method for controlling the reconfiguration of the physical storage area in a real storage device employed by an information processing system. The invention includes an address reconfiguration array having a plurality of storage blocks which are each assigned to a virtual computer. Each storage block is composed of a plurality of host real-address entries. Assigned to a storage area in the logical memory of a virtual computer, each host real-address entry includes a validity field containing a validity bit and a host real-address field containing a high-order part of the start address of a real storage segment allocated to the storage area. The invention also includes a selector which receives the identifier of a virtual computer and a logical address from the virtual computer, and makes use of the identifier for choosing a storage block from the address reconfiguration array and a high-order portion of the logical address for selecting a host real-address entry from the chosen storage block. The value of the host real-address field of the selected host real-address entry, the high-order part of a real address, is then read out from the selected host real-address entry, and is merged with the low-order portion of the logical address in order to create a real address. If the validity bit indicates that the contents of the host real-address entry are invalid, however, the virtual computer is interrupted. A change to the contents of the address reconfiguration array can be made by replacing the contents of a host real-address entry chosen by the selector with update data.

Inventors

  • 👤 Osamu Onodera

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 01:15
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/0223; G06F12/0284; G06F12/08; G06F12/12; G06F12/121; G06F2212/00; G06F2212/15; G06F2212/151

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 298 words
A method of controlling reconfiguration of a physical storage area of a real storage device included in an information processing apparatus having said real storage device, and a plurality of virtual computers operating on a central processing unit, wherein said physical storage area is logically divided into a plurality of storage segments to be allocated to a plurality of logical memories each employed in one of said virtual computers operating on said central processing unit, and an address reconfiguration array which includes a plurality of storage blocks each being assigned to one of said virtual computers and having its logical memory divided into a plurality of logical storage areas according to a high-order portion of logical addresses thereof, wherein each of said storage blocks is composed of a plurality of host real-address entries each being assigned to one of said logical storage areas and used for storing a high-order part of a start address of one of said storage segments of said physical storage area, said method comprising the steps of: selecting a storage block from said address reconfiguration array in accordance with an identifier of a virtual computer, said identifier being issued by said virtual computer; selecting one of said host real-address entries from the selected storage block in accordance with said high-order portion of a logical address specified by said virtual computer which issued said identifier; and generating a real address of said real storage device by reading out said high-order part of a start address of one of said storage segments from the selected host real-address entry, and merging said high-order part of said start address of one of said storage segments with a remaining low-order portion of said logical address to create said real address of said storage segment of said real storage device.
Claim 2
Independent Claim 298 words
A method of controlling reconfiguration of a physical storage area of a real storage device included in an information processing apparatus having said real storage device, and a plurality of virtual computers operating on a central processing unit, wherein said physical storage area is logically divided into a plurality of storage segments to be allocated to a plurality of logical memories each employed in one of said virtual computers operating on said central processing unit, and an address reconfiguration array which includes a plurality of storage blocks each being assigned to one of said virtual computers and having its logical memory divided into a plurality of logical storage areas according to a high-order portion of logical addresses thereof, wherein each of said storage blocks is composed of a plurality of host real-address entries each being assigned to one of said logical storage areas and used for storing a high-order part of a start address of one of said storage segments of said physical storage area, said method comprising the steps of: selecting a storage block from said address reconfiguration array in accordance with an identifier of a virtual computer, said identifier being issued by said virtual computer; selecting one of said host real-address entries from the selected storage block in accordance with said high-order portion of a logical address specified by said virtual computer which issued said identifier; and generating a real address of said real storage device by reading out said high-order part of a start address of one of said storage segments from the selected host real-address entry, and merging said high-order part of said start address of one of said storage segments with a remaining low-order portion of said logical address to create said real address of said storage segment of said real storage device.
Claim 3
Dependent Claim 155 words
A method according to claim 1, wherein each host real-address entry comprises a validity field for storing a flag indicating whether or not contents of said host real-address entry are valid, and a host real-address field for storing said high-order part of a start address of one of said storage segments of said real storage device; and wherein said generating step comprises the steps of: examining said flag in said validity field to determine whether or not said contents of said selected host real-address entry are valid, reporting, when said contents of the selected host real-address entry are found invalid, a cause of a program interrupt indicating an addressing exception to said virtual computer making said request, and carrying out, when said contents of the selected host real-address entry are found valid, said request for address conversion and using an address resulting from address conversion as a valid real address of said real storage device.
Claim 4
Dependent Claim 124 words
A method according to claim 2 wherein said generating step further comprises the steps of: updating, when only validity information is issued to said address reconfiguration array in said request for address conversion to make a change to contents of one of said host real-address entries selected by said request for address conversion, only said validity field of the selected host real-address entry; and updating, when only said high-order part of a start address of one of said storage segments is issued to said address reconfiguration array in said request for address conversion to make a change to contents of one of said host real-address entries selected by said request for address conversion, only said host real-address field of the selected host real-address entry.
Claim 5
Independent Claim 302 words
An apparatus for controlling reconfiguration of a physical storage area of a real storage device included in an information processing system having said real storage device and a plurality of virtual computers operating on a central processing unit, wherein said physical storage area is logically divided into a plurality of storage segments to be allocated to a plurality of logical memories each employed in one of said virtual computers operating on said central processing unit, said apparatus comprising: an address reconfiguration array which includes a plurality of storage blocks each being assigned to one of said virtual computers and having its logical memory divided into a plurality of logical storage areas according to a high-order portion of logical addresses thereof, wherein each of said storage blocks is composed of a plurality of host real-address entries each being assigned to one of said logical storage areas and used for storing a high-order part of a start address of one of said storage segments of said physical storage area; a selector for selecting a storage block from said address reconfiguration array in accordance with an identifier of a virtual computer, said identifier being issued by said virtual computer and selecting one of said host real-address entries from the selected storage block in accordance with a high-order portion of a logical address specified by said virtual computer which issued said identifier; and an address generator for generating a real address of said real storage device by reading out said high-order part of a start address of one of said storage segments from the selected host real-address entry and merging said high-order part of a start address of one of said storage segments with a remaining low-order portion of said logical address to create said real address of said storage segment of said real storage device.
Claim 6
Independent Claim 302 words
An apparatus for controlling reconfiguration of a physical storage area of a real storage device included in an information processing system having said real storage device and a plurality of virtual computers operating on a central processing unit, wherein said physical storage area is logically divided into a plurality of storage segments to be allocated to a plurality of logical memories each employed in one of said virtual computers operating on said central processing unit, said apparatus comprising: an address reconfiguration array which includes a plurality of storage blocks each being assigned to one of said virtual computers and having its logical memory divided into a plurality of logical storage areas according to a high-order portion of logical addresses thereof, wherein each of said storage blocks is composed of a plurality of host real-address entries each being assigned to one of said logical storage areas and used for storing a high-order part of a start address of one of said storage segments of said physical storage area; a selector for selecting a storage block from said address reconfiguration array in accordance with an identifier of a virtual computer, said identifier being issued by said virtual computer and selecting one of said host real-address entries from the selected storage block in accordance with a high-order portion of a logical address specified by said virtual computer which issued said identifier; and an address generator for generating a real address of said real storage device by reading out said high-order part of a start address of one of said storage segments from the selected host real-address entry and merging said high-order part of a start address of one of said storage segments with a remaining low-order portion of said logical address to create said real address of said storage segment of said real storage device.
Claim 7
Dependent Claim 32 words
An apparatus according to claim 4, further comprising: modification means for making a change to contents of the selected host real-address entry by replacing previous contents of the selected host real-address entry.
Claim 8
Dependent Claim 53 words
An apparatus according to claim 4, wherein each of said host real-address entries comprises: a validity field for storing a flag indicating whether or not contents of said host real-address entry are valid; and a host real-address field for storing said high-order part of a start address of one of said storage segments.
Claim 9
Dependent Claim 32 words
A method according to claim 1, further comprising the step of: making a change to contents of the selected host real-address entry by replacing previous contents of the selected host real-address entry.
Claim 10
Dependent Claim 39 words
A method according to claim 2, further comprising the step of: making a change to contents of the selected host real-address entry by replacing previous contents of the validity and host real-address fields of the selected host real-address entry.

References Cited (Backward Citations)

US3723976A Cited
US4075694A Cited
US4685057A Cited
US4761737A Cited
EP0301275A2 Cited
JPH0233639A Cited
GB2256513A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-11-03 2001-05-05 2001-11-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-11-03 2005-05-05 2005-11-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-11-03 2009-05-05 2009-11-04 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag