US5677222A
Expired / Lapsed
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Method for forming a DRAM capacitor
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1996-10-11
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Granted: 1997-10-14
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Expires: 2016-10-11
Abstract
Abstract An improved method for forming a dynamic random access memory (DRAM) capacitor with increased capacitance is disclosed. The method includes forming an oxide layer on a semiconductor substrate with a metal-oxide-semiconductor field effect transistor (MOSFET) conventionally formed therein and thereon. A planarized silicon nitride layer is then formed on the oxide layer. Then alternating layers of dielectric layers having different etch rates are formed on the silicon nitride layer. Standard photolithographic methods are used to etch a trench through the dielectric layers and the silicon nitride layer to expose the source region of the MOSFET. The trench is then isotropically etched, forming rounded cavities in portions of the dielectric layers having the faster etch rate. The rounded cavities extend horizontally into the sidewalls of the trench. A doped polysilicon layer is then formed on the top of the dielectric layers so as to fill the trench and the rounded cavities. The polysilicon layer is then patterned and etched to removed the polysilicon layer around the trench. The dielectric layers are then removed, thereby forming the bottom electrode of a DRAM cell capacitor.
Inventors
- 👤 Horng-Huei Tseng
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 13:48
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10B12/30; H10B12/31; H10B12/318; H10D; H10D1/00; H10D1/01; H10D1/041; H10D1/042; H10D1/60; H10D1/68; H10D1/692; H10D1/711; H10D1/714; H10D1/716
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
221 words
A method for forming a capacitor of a dynamic random access memory cell, said method comprising: forming an oxide layer on a substrate; forming a nitride layer on said oxide layer; forming a dielectric stack over said nitride layer, said dielectric stack comprising alternating layers of first dielectric material and a second dielectric material, the first dielectric material possessing a first etch rate and the second dielectric material possessing a second etch rate, wherein the first etch rate is different from the second etch rate; forming a photoresist layer on the dielectric stack, wherein said photoresist layer defines a storage node area over a portion of said substrate; removing portions of said dielectric stack, said nitride layer and said oxide layer to form a trench, said portions of said dielectric stack, said nitride layer and said oxide layer being left uncovered by said photoresist layer; removing said photoresist layer; isotropically etching said dielectric stack to form recessed cavities in a sidewall of the trench in said dielectric stack; forming a doped polysilicon layer over said dielectric stack, said doped polysilicon layer filling the trench and the recessed cavities; removing portions of said doped polysilicon layer surrounding a top opening of the trench; and removing the dielectric stack, thereby forming an electrode of the capacitor of the dynamic random access memory cell.
Claim 2
Independent Claim
221 words
A method for forming a capacitor of a dynamic random access memory cell, said method comprising: forming an oxide layer on a substrate; forming a nitride layer on said oxide layer; forming a dielectric stack over said nitride layer, said dielectric stack comprising alternating layers of first dielectric material and a second dielectric material, the first dielectric material possessing a first etch rate and the second dielectric material possessing a second etch rate, wherein the first etch rate is different from the second etch rate; forming a photoresist layer on the dielectric stack, wherein said photoresist layer defines a storage node area over a portion of said substrate; removing portions of said dielectric stack, said nitride layer and said oxide layer to form a trench, said portions of said dielectric stack, said nitride layer and said oxide layer being left uncovered by said photoresist layer; removing said photoresist layer; isotropically etching said dielectric stack to form recessed cavities in a sidewall of the trench in said dielectric stack; forming a doped polysilicon layer over said dielectric stack, said doped polysilicon layer filling the trench and the recessed cavities; removing portions of said doped polysilicon layer surrounding a top opening of the trench; and removing the dielectric stack, thereby forming an electrode of the capacitor of the dynamic random access memory cell.
Claim 3
Dependent Claim
26 words
The method according to claim 1, wherein said substrate includes a metal-oxide-semiconductor transistor, said metal-oxide-semiconductor transistor being a part of the dynamic random access memory cell.
Claim 4
Dependent Claim
12 words
The method according to claim 1, further comprising planarizing said nitride layer.
Claim 5
Dependent Claim
26 words
The method according to claim 1, wherein said first dielectric material comprises an oxide formed by a thermal chemical vapor deposition method using ozone-tetraethylorthosilicate reaction gas.
Claim 6
Dependent Claim
30 words
The method according to claim 4, wherein said dielectric layer possessing the second etch rate is formed by a plasma enhanced chemical vapor deposition method using tetraethylorthosilicate (TEOS) reaction gas.
Claim 7
Dependent Claim
18 words
The method according to claim 5, wherein said first etch rate is larger than said second etch rate.
Claim 8
Dependent Claim
19 words
The method according to claim 6, wherein said rounded cavities are formed in layers of said first dielectric material.
Claim 9
Dependent Claim
14 words
The method according to claim 1, wherein said first dielectric material comprises silicon nitride.
Claim 10
Dependent Claim
28 words
The method according to claim 1, wherein said isotropically etching said dielectric stack comprises etching said dielectric stack by a wet etch method using a HF solution etchant.
Claim 11
Dependent Claim
22 words
The method according to claim 1, wherein said removing said dielectric stack comprises etching the dielectric stack using a HF solution etchant.
Claim 12
Independent Claim
249 words
A method for forming a capacitor of a dynamic random access memory cell, said method comprising: forming an oxide layer on a substrate; forming a nitride layer on said oxide layer; forming a dielectric stack over said nitride layer, said dielectric stack comprising alternating layers of first dielectric material and a second dielectric material, the first dielectric material possessing a first etch rate and the second dielectric material possessing a second etch rate, wherein the first etch rate is different from the second etch rate; forming a photoresist layer on the dielectric stack, wherein said photoresist layer defines a storage node area over a portion of said substrate; forming a polymer layer on a top surface and a sidewall of the photoresist layer by reacting said photoresist layer with a plasma gas; removing portions of said dielectric stack, said nitride layer and said oxide layer to form a trench, said portions of said dielectric stack, said nitride layer and said oxide layer being left uncovered by said polymer layer; removing said polymer layer; removing said photoresist layer; isotropically etching said dielectric stack to form recessed cavities in a sidewall of the trench in said dielectric stack; forming a doped polysilicon layer over said dielectric stack, said doped polysilicon layer filling the trench and the recessed cavities; removing portions of said doped polysilicon layer surrounding a top opening of the trench; and removing the dielectric stack, thereby forming an electrode of the capacitor of the dynamic random access memory cell.
Claim 13
Independent Claim
249 words
A method for forming a capacitor of a dynamic random access memory cell, said method comprising: forming an oxide layer on a substrate; forming a nitride layer on said oxide layer; forming a dielectric stack over said nitride layer, said dielectric stack comprising alternating layers of first dielectric material and a second dielectric material, the first dielectric material possessing a first etch rate and the second dielectric material possessing a second etch rate, wherein the first etch rate is different from the second etch rate; forming a photoresist layer on the dielectric stack, wherein said photoresist layer defines a storage node area over a portion of said substrate; forming a polymer layer on a top surface and a sidewall of the photoresist layer by reacting said photoresist layer with a plasma gas; removing portions of said dielectric stack, said nitride layer and said oxide layer to form a trench, said portions of said dielectric stack, said nitride layer and said oxide layer being left uncovered by said polymer layer; removing said polymer layer; removing said photoresist layer; isotropically etching said dielectric stack to form recessed cavities in a sidewall of the trench in said dielectric stack; forming a doped polysilicon layer over said dielectric stack, said doped polysilicon layer filling the trench and the recessed cavities; removing portions of said doped polysilicon layer surrounding a top opening of the trench; and removing the dielectric stack, thereby forming an electrode of the capacitor of the dynamic random access memory cell.
Claim 14
Dependent Claim
26 words
The method according to claim 11, wherein said substrate includes a metal-oxide-semiconductor transistor, said metal-oxide-semiconductor transistor being a part of the dynamic random access memory cell.
Claim 15
Dependent Claim
12 words
The method according to claim 11, further comprising planarizing said nitride layer.
Claim 16
Dependent Claim
25 words
The method according to claim 11, wherein said first dielectric material comprises an oxide formed by a chemical vapor deposition method using ozone-tetraethylorthosilicate reaction gas.
Claim 17
Dependent Claim
29 words
The method according to claim 14, wherein said dielectric layer possessing the second etch rate is formed by a plasma enhanced chemical vapor deposition method using tetraethylorthosilicate reaction gas.
Claim 18
Dependent Claim
18 words
The method according to claim 15, wherein said first etch rate is larger than said second etch rate.
Claim 19
Dependent Claim
19 words
The method according to claim 16, wherein said rounded cavities are formed in layers of said first dielectric material.
Claim 20
Dependent Claim
14 words
The method according to claim 11, wherein said first dielectric material comprises silicon nitride.
Claim 21
Dependent Claim
28 words
The method according to claim 11, wherein said isotropically etching said dielectric stack comprises etching said dielectric stack by a wet etch method using a HF solution etchant.
Claim 22
Dependent Claim
22 words
The method according to claim 11, wherein said removing said dielectric stack comprises etching the dielectric stack using a HF solution etchant.
Claim 23
Dependent Claim
15 words
The method according to claim 11, wherein said plasma gas comprises CHF 3 and HBr.
Claim 24
Dependent Claim
23 words
The method according to claim 11, wherein said removing said polymer layer comprises etching said polymer layer using H 2 SO 4 etchant.
References Cited (Backward Citations)
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