US5675569A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Readback circuit for an optical information reading and recording apparatus
Assignee: Sharp Corp
•
Filing: 1995-12-05
•
Granted: 1997-10-07
•
Expires: 2015-12-05
Abstract
Abstract A recorded signal reproduction circuit in an optical disc information reading and recording apparatus converts a recorded signal recovered from an optical disc to PR (1, 2, 1) characteristics through a equalizer circuit, digitizes it through an A/D converter and at the same time also generates a clock signal synchronized in phase with the equalizer circuit output signal by using a binary edcoder circuit and a PLL circuit. This clock signal is then provided to an A/D converter as the sampling clock. The A/D converter output signal is then decoded to the original channel bit stream based on the clock signal. Because the equalizer circuit output signal is provided to both the binary encoder/PLL circuit and the A/D converter together, additional circuity for converting signals into a binary series of pulses is unnecessary and reduction of circuit scale is possible. Moreover, in case of a change-over in the frequency characteristics of the equalizer circuit, due to a change in recording and reproduction frequency, the change-over will not affect the phase relationship between an input signal to the A/D converter and a sampling clock. In addition, it becomes simple to adjust this phase relation.
Inventors
- 👤 Takeshi Yamaguchi
- 👤 Tsuneo Fujiwara
- 👤 Hiroshige Hirajima
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 23:16
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/10009; G11B20/10046; G11B20/10055; G11B20/10101; G11B20/22; G11B11/00; G11B11/10; G11B11/105; G11B11/10502; G11B11/10515; G11B7/00; G11B7/004; G11B7/005
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
269 words
A recorded signal readback circuit of an optical information reading and recording apparatus, comprising: an equalizer circuit for equalizing a readback signal from a recording medium to PR (1, 2, 1) characteristics in waveform, said readback signal comprising a channel bit stream of recorded information wherein said information is encoded such that sequential channel bits within the bit stream have a minimum reverse interval of not less than two channel bits; a binary encoder circuit, said binary encoder circuit converting an output signal of said equalizer circuit into a series of binary pulses, wherein said binary encoder circuit comprises: a high frequency band emphasis circuit that increases a gain of the output signal of said equalizer circuit at high frequencies, an envelope limit detecting circuit that detects positive and negative envelope limits of an output signal envelope of said high frequency band emphasis circuit, a median value detector circuit that calculates a median value between said positive and negative envelope limits, and a comparator circuit that compares the output signal of said equalizer circuit with the median value; said readback circuit further comprising a correction circuit for amending the output signal of said equalizer circuit in response to said median value; a phase-locked-loop (PLL) circuit for outputting a clock signal synchronized in phase with the series of binary pulses; an A/D converter for digitizing an output signal of said equalizer circuit in response to said clock signal; and a Viterbi decoder, said decoder decoding an output value from said A/D converter using a maximum likelihood decoding approach to reproduce said channel bit stream devoid of undesirable low frequency offset.
Claim 2
Dependent Claim
269 words
A recorded signal readback circuit of an optical information reading and recording apparatus, comprising: an equalizer circuit for equalizing a readback signal from a recording medium to PR (1, 2, 1) characteristics in waveform, said readback signal comprising a channel bit stream of recorded information wherein said information is encoded such that sequential channel bits within the bit stream have a minimum reverse interval of not less than two channel bits; a binary encoder circuit, said binary encoder circuit converting an output signal of said equalizer circuit into a series of binary pulses, wherein said binary encoder circuit comprises: a high frequency band emphasis circuit that increases a gain of the output signal of said equalizer circuit at high frequencies, an envelope limit detecting circuit that detects positive and negative envelope limits of an output signal envelope of said high frequency band emphasis circuit, a median value detector circuit that calculates a median value between said positive and negative envelope limits, and a comparator circuit that compares the output signal of said equalizer circuit with the median value; said readback circuit further comprising a correction circuit for amending the output signal of said equalizer circuit in response to said median value; a phase-locked-loop (PLL) circuit for outputting a clock signal synchronized in phase with the series of binary pulses; an A/D converter for digitizing an output signal of said equalizer circuit in response to said clock signal; and a Viterbi decoder, said decoder decoding an output value from said A/D converter using a maximum likelihood decoding approach to reproduce said channel bit stream devoid of undesirable low frequency offset.
Claim 3
Dependent Claim
31 words
A recorded signal readback circuit as set forth in claim 1, wherein said correction circuit is a subtracter for subtracting the median value from the output signal of said equalizer circuit.
Claim 4
Dependent Claim
83 words
A recorded signal readback circuit as set forth in claim 1, wherein said equalizer circuit includes: first and second delay elements for successively delaying said readback signal for a same delay time; first and second amplifiers for respectively amplifying said readback signal and an output signal of said second delay element in accordance with a same amplitude factor; and a subtracter circuit for subtracting two output signals of said respective first and second amplifiers from an output signal of said first delay element.
Claim 5
Dependent Claim
36 words
A recorded signal readback circuit as set forth in claim 1, wherein said recording medium is a magneto-optic disc, and said readback signal is read from said magneto-optic disc while rotated at a constant angular velocity.
Claim 6
Dependent Claim
25 words
A recorded signal readback circuit as set forth in claim 1, wherein, said data are modulated in accordance with a (1, 7) RLL encoding scheme.
Claim 7
Dependent Claim
239 words
A recorded signal readback circuit of an optical information reading and recording apparatus comprising: an equalizer circuit for equalizing a readback signal from a recording medium to PR (1, 2, 1) characteristics in waveform, said readback signal comprising a channel bit stream of recorded information wherein said information is encoded such that sequential channel bits within the bit stream have a minimum reverse interval of not less than two channel bits; a high pass filter for cutting off a low frequency band of an output signal of said equalizer circuit; an adder circuit connected to receive an output of said high pass filter; a comparator for comparing an output of said adder circuit with a predetermined value so as to output a series of pulses; a low pass falter connected between an output of said comparator and an input of said adder circuit, said low pass filter providing low frequency signal components of said readback signal to the output of said high pass filter by way of said adder circuit to inhibit envelope fluctuation; a phase-locked-loop (PLL) circuit for outputting a clocking signal that is synchronized in phase with said series of pulses of said comparator; an A/D converter for digitizing an output signal of said adder circuit based on said clocking signal; and a Viterbi decoder, said decoder decoding an output value from said A/D converter to reproduce said channel bit stream devoid of undesirable low frequency offset.
Claim 8
Dependent Claim
239 words
A recorded signal readback circuit of an optical information reading and recording apparatus comprising: an equalizer circuit for equalizing a readback signal from a recording medium to PR (1, 2, 1) characteristics in waveform, said readback signal comprising a channel bit stream of recorded information wherein said information is encoded such that sequential channel bits within the bit stream have a minimum reverse interval of not less than two channel bits; a high pass filter for cutting off a low frequency band of an output signal of said equalizer circuit; an adder circuit connected to receive an output of said high pass filter; a comparator for comparing an output of said adder circuit with a predetermined value so as to output a series of pulses; a low pass falter connected between an output of said comparator and an input of said adder circuit, said low pass filter providing low frequency signal components of said readback signal to the output of said high pass filter by way of said adder circuit to inhibit envelope fluctuation; a phase-locked-loop (PLL) circuit for outputting a clocking signal that is synchronized in phase with said series of pulses of said comparator; an A/D converter for digitizing an output signal of said adder circuit based on said clocking signal; and a Viterbi decoder, said decoder decoding an output value from said A/D converter to reproduce said channel bit stream devoid of undesirable low frequency offset.
Claim 9
Dependent Claim
73 words
A recorded signal readback circuit as set forth in claim 6, further comprising: an input capacitor, said input capacitor provided before the equalizer circuit and providing AC coupling of the readback signal, wherein said high pass filter has a cut-off frequency higher than that determined by a time constant of the AC coupling capacitor; and said low pass filter has an equal cut off frequency identical to that of said high pass filter.
Claim 10
Dependent Claim
83 words
A recorded signal readback circuit as set forth in claim 6, wherein, said equalizer circuit includes: first and second delay elements for successively delaying said readback signal for a same delay time; first and second amplifiers for respectively amplifying said readback signal and an output signal of said second delay element in accordance with a same amplitude factor; and a subtracter circuit for subtracting two output signals of said respective first and second amplifiers from an output signal of said first delay element.
Claim 11
Dependent Claim
36 words
A recorded signal readback circuit as set forth in claim 6, wherein said recording medium is a magneto-optic disc, and said readback signal is read from said magneto-optic disc while rotated at a constant angular velocity.
Claim 12
Dependent Claim
25 words
A recorded signal readback circuit as set forth in claim 6, wherein, said data are modulated in accordance with a (1, 7) RLL encoding scheme.
Claim 13
Independent Claim
181 words
A method for canceling undesirable low frequency offset incurred during recovery of distal information recorded on an optical recording medium, comprising the steps of: (a) equalizing a readback signal comprising a channel bit stream of information obtained from an optical recording medium to PR (1, 2, 1) characteristics in waveform; (b) producing a series of binary pulses from an equalized signal of step (a) by detecting positive and negative limits of an envelope of said equalized signal, calculating a median value between said positive and negative limits, and comparing the median value to said equalized signal; (c) applying a correction signal to said equalized signal to correct for low frequency offset, said correction signal based on a median envelope value determined in step (b); (d) providing a clocking signal that is synchronized in phase with said series of binary pulses produced in step (b); (e) sampling and converting a corrected equalized signal of step (c) into digitally encoded values at sample times based on said clocking signal; and (f) decoding the digitally encoded signal of step (e) using a Viterbi decoder.
Claim 14
Independent Claim
181 words
A method for canceling undesirable low frequency offset incurred during recovery of distal information recorded on an optical recording medium, comprising the steps of: (a) equalizing a readback signal comprising a channel bit stream of information obtained from an optical recording medium to PR (1, 2, 1) characteristics in waveform; (b) producing a series of binary pulses from an equalized signal of step (a) by detecting positive and negative limits of an envelope of said equalized signal, calculating a median value between said positive and negative limits, and comparing the median value to said equalized signal; (c) applying a correction signal to said equalized signal to correct for low frequency offset, said correction signal based on a median envelope value determined in step (b); (d) providing a clocking signal that is synchronized in phase with said series of binary pulses produced in step (b); (e) sampling and converting a corrected equalized signal of step (c) into digitally encoded values at sample times based on said clocking signal; and (f) decoding the digitally encoded signal of step (e) using a Viterbi decoder.
Claim 15
Dependent Claim
29 words
The method of claim 11 wherein said correction signal of step (c) is equal to a median envelope value and is subtracted from the equalized signal of step (a).
Claim 16
Independent Claim
162 words
A method for canceling undesirable low frequency offset incurred during recovery of digital information recorded on an optical recording medium, comprising the steps of: (a) equalizing a readback signal comprising a channel bit stream of information obtained from an optical recording medium to PR (1, 2, 1) characteristics in waveform; (b) filtering an equalized readback signal of step (a) to eliminate a low frequency band of signals; (c) producing a series of pulses from a filtered signal of step (b) by comparing said filtered signal to a predetermined reference value; (d) applying a correction signal to a filtered signal of step (b) to inhibit envelope fluctuation; (e) providing a clocking signal that is synchronized in phase with said series of pulses produced in step (c); (f) sampling and converting a corrected filtered signal of step (d) into digitally encoded values at sample times based on said clocking signal; and (g) decoding the digitally encoded signal of step (f) using a Viterbi decoder.
Claim 17
Independent Claim
162 words
A method for canceling undesirable low frequency offset incurred during recovery of digital information recorded on an optical recording medium, comprising the steps of: (a) equalizing a readback signal comprising a channel bit stream of information obtained from an optical recording medium to PR (1, 2, 1) characteristics in waveform; (b) filtering an equalized readback signal of step (a) to eliminate a low frequency band of signals; (c) producing a series of pulses from a filtered signal of step (b) by comparing said filtered signal to a predetermined reference value; (d) applying a correction signal to a filtered signal of step (b) to inhibit envelope fluctuation; (e) providing a clocking signal that is synchronized in phase with said series of pulses produced in step (c); (f) sampling and converting a corrected filtered signal of step (d) into digitally encoded values at sample times based on said clocking signal; and (g) decoding the digitally encoded signal of step (f) using a Viterbi decoder.
Claim 18
Dependent Claim
36 words
The method of claim 13 wherein said correction signal of step (d) is a low frequency band component of said series of pulses of step (c) and is added to said filtered signal of step (b).
References Cited (Backward Citations)
JPH03166839A
Cited
JPH04162262A
Cited
US5357524A
Cited
US5377054A
Cited
US5469415A
Cited
US5455813A
Cited
US5506827A
Cited
US5517476A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-10-06 | 2001-04-07 | 2001-10-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-10-06 | 2005-04-07 | 2005-10-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-10-06 | 2009-04-07 | 2009-10-07 | $7700.00 | Window Closed / Lapsed |