Abstract A current sensing circuit has an output NMOS transistor, connected between an output node and a power supply terminal, for passing a load current of an output load, a pair of sensing NMOS and PMOS transistors connected, in series at a first node, between the output node and the power supply terminal, a control section for supplying a common gate voltage to the transistors, and a voltage detecting section for detecting the potential at the first node. When the output transistor and sensing NMOS transistor are on, the sensing PMOS transistor is off. Accordingly, substantially no current flows through the sensing transistors so that power consumption for sensing operation is reduced. The output transistor is a vertical MOSFET while the sensing transistors are horizontal MOSFET integrated in a semiconductor circuit.
A current sensing circuit coupled between a load having a load current passing therethrough and a power supply terminal, comprising: a first transistor coupled between an output terminal and said power supply terminal for passing said load current; a second and a third transistors connected, in series at a first node between said output terminal and said power supply terminal, a control section for supplying a first control signal to turn on said first and second transistors while supplying a second control signal to turn off said third transistor during a sensing operation; and a voltage detection section for detecting a voltage at said first node.
Claim 2
Dependent Claim
106 words
A current sensing circuit coupled between a load having a load current passing therethrough and a power supply terminal, comprising: a first transistor coupled between an output terminal and said power supply terminal for passing said load current; a second and a third transistors connected, in series at a first node between said output terminal and said power supply terminal, a control section for supplying a first control signal to turn on said first and second transistors while supplying a second control signal to turn off said third transistor during a sensing operation; and a voltage detection section for detecting a voltage at said first node.
Claim 3
Dependent Claim
39 words
The current sensing circuit as defined in claim 1 wherein said first and second transistors are NMOS transistors and said third transistor is PMOS transistor, and wherein said second control signal is substantially equal to said first control signal.
Claim 4
Dependent Claim
33 words
The current sensing circuit as defined in claim 1 wherein said first through third transistors are NMOS transistors and wherein said second control signal is opposite in polarity to said first control signal.
Claim 5
Dependent Claim
28 words
The current sensing circuit as defined in claim 1 wherein said first transistor is a vertical MOS transistor and said second and third transistors are horizontal MOS transistors.
Claim 6
Dependent Claim
22 words
The current sensing circuit as defined in claim 1 further comprising a resistor inserted between said first node and said third transistor.