US5668957A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for providing virtual DMA capability on an adapter connected to a computer system bus with no DMA support
Assignee: International Business Machines Corp
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Filing: 1995-11-02
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Granted: 1997-09-16
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Expires: 2015-11-02
Abstract
Abstract Apparatus and method for providing virtual DMA capability for an adapter card connected to a host system bus with no DMA support. A special interface circuit resides on an adapter card together with a cache data memory. A special software driver resides in the host system. The software driver manages DMA transfers for the application processing circuitry on the adapter card using the cache data memory. The processing circuitry on the adapter card transfers data in and out of the cache data memory as if it had direct memory access to host system memory. In this way, an adapter card for a non-DMA-capable bus, such as the personal computer memory card international association (PCMCIA) bus can act as a bus master.
Inventors
- 👤 Gordon Taylor Davis
- 👤 Robert James Devins
- 👤 Patrick Kwong-hung Kam
- 👤 James L. Patrick, Jr.
- 👤 John Michael Krause
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 20:56
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/28; G06F13/10; G06F13/102
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
159 words
An interface circuit for providing virtual direct memory access (DMA) capability to an adapter card connected to a computer system bus without DMA support, the interface circuit comprising: DMA-capable bus connections; non-DMA-capable bus connections; cache memory address and data connections; cache memory command and control connections; a multiplexer array disposed between the DMA and non-DMA capable bus connections and the cache memory address and data connections so that a cache memory can be alternatively interfaced to a DMA and a non-DMA capable bus; bus cycle state control logic disposed between the cache memory command and control connections and the multiplexer array; refresh and arbitration logic connected to the bus cycle state control logic and the multiplexer array, the refresh and arbitration logic and the bus cycle state control logic for controlling the multiplexer array; and memory command and wait logic disposed between the memory command and control connections and the refresh and arbitration and bus cycle state control logic.
Claim 2
Dependent Claim
159 words
An interface circuit for providing virtual direct memory access (DMA) capability to an adapter card connected to a computer system bus without DMA support, the interface circuit comprising: DMA-capable bus connections; non-DMA-capable bus connections; cache memory address and data connections; cache memory command and control connections; a multiplexer array disposed between the DMA and non-DMA capable bus connections and the cache memory address and data connections so that a cache memory can be alternatively interfaced to a DMA and a non-DMA capable bus; bus cycle state control logic disposed between the cache memory command and control connections and the multiplexer array; refresh and arbitration logic connected to the bus cycle state control logic and the multiplexer array, the refresh and arbitration logic and the bus cycle state control logic for controlling the multiplexer array; and memory command and wait logic disposed between the memory command and control connections and the refresh and arbitration and bus cycle state control logic.
Claim 3
Dependent Claim
28 words
The interface circuit of claim 1 wherein the multiplexer array selects high and low bytes in sequence to provide sixteen bit access to an eight bit cache memory.
Claim 4
Dependent Claim
31 words
The interface circuit of claim 1 wherein the DMA-capable bus is an industry standard architecture (ISA) bus and the non-DMA-capable bus is a personal computer memory card international association (PCMCIA) bus.
Claim 5
Dependent Claim
31 words
The interface circuit of claim 2 wherein the DMA-capable bus is an industry standard architecture (ISA) bus and the non-DMA-capable bus is a personal computer memory card international association (PCMCIA) bus.
Claim 6
Dependent Claim
33 words
The interface circuit according to any of claims 1 through 4 further comprising a cache memory connected to the cache memory data and address connections and the cache memory command and control connections.
Claim 7
Dependent Claim
119 words
An adapter card which provides virtual direct memory access (DMA) capability while connected to a computer system bus without DMA support, the adapter card comprising: a non-DMA-capable bus interface; adapter card processing circuitry having an on-card, DMA, capable bus interface; a cache data memory; an interface circuit for providing virtual DMA capability to the adapter card processing circuitry, the interface circuit connected to the cache data memory and disposed between the non-DMA capable bus interface and the on-card, DMA-capable bus interface, the interface circuit having a multiplexer array for alternatively interconnecting the cache data memory to the DMA and non-DMA capable bus interfaces; and a flash buffer memory disposed between the interface circuit and the non-DMA capable bus interface.
Claim 8
Dependent Claim
119 words
An adapter card which provides virtual direct memory access (DMA) capability while connected to a computer system bus without DMA support, the adapter card comprising: a non-DMA-capable bus interface; adapter card processing circuitry having an on-card, DMA, capable bus interface; a cache data memory; an interface circuit for providing virtual DMA capability to the adapter card processing circuitry, the interface circuit connected to the cache data memory and disposed between the non-DMA capable bus interface and the on-card, DMA-capable bus interface, the interface circuit having a multiplexer array for alternatively interconnecting the cache data memory to the DMA and non-DMA capable bus interfaces; and a flash buffer memory disposed between the interface circuit and the non-DMA capable bus interface.
Claim 9
Dependent Claim
37 words
The adapter card of claim 6 wherein the cache data memory is an eight bit memory and the multiplexer array selects high and low bytes in sequence to provide sixteen bit access to the cache data memory.
Claim 10
Dependent Claim
32 words
The adapter card of claim 6 wherein the on-card DMA-capable bus is an industry standard architecture (ISA) bus and the non-DMA-capable bus is a personal computer memory card international association (PCMCIA) bus.
Claim 11
Dependent Claim
32 words
The adapter card of claim 7 wherein the on-card DMA-capable bus is an industry standard architecture (ISA) bus and the non-DMA-capable bus is a personal computer memory card international association (PCMCIA) bus.
Claim 12
Dependent Claim
101 words
An interface circuit for providing virtual direct memory access (DMA) capability to an adapter card connected to a computer system bus without DMA support, the interface circuit comprising: connections for a DMA-capable bus; connections for a non-DMA-capable bus; connections for a cache memory; a multiplexer array disposed between the DMA and non-DMA capable bus connections and the cache memory connections, the multiplexer array for alternatively interconnecting a cache memory to a DMA and a non-DMA capable computer bus; and logic for controlling a cache memory and the multiplexer array, the logic connected to the multiplexer array and the cache memory connections.
Claim 13
Dependent Claim
101 words
An interface circuit for providing virtual direct memory access (DMA) capability to an adapter card connected to a computer system bus without DMA support, the interface circuit comprising: connections for a DMA-capable bus; connections for a non-DMA-capable bus; connections for a cache memory; a multiplexer array disposed between the DMA and non-DMA capable bus connections and the cache memory connections, the multiplexer array for alternatively interconnecting a cache memory to a DMA and a non-DMA capable computer bus; and logic for controlling a cache memory and the multiplexer array, the logic connected to the multiplexer array and the cache memory connections.
Claim 14
Dependent Claim
31 words
The interface circuit of claim 10 wherein the DMA-capable bus is an industry standard architecture (ISA) bus and the non-DMA-capable bus is a personal computer memory card international association (PCMCIA) bus.
Claim 15
Dependent Claim
17 words
The interface circuit of claim 10 further comprising a cache memory connected to the cache memory connections.
Claim 16
Dependent Claim
17 words
The interface circuit of claim 11 further comprising a cache memory connected to the cache memory connections.
Claim 17
Dependent Claim
127 words
A computer implemented method for providing virtual direct memory access (DMA) data transfers between an adapter card and a host computer system having a bus with no DMA capability, the method comprising the steps of: opening a common memory window between host system memory and a data cache memory on the adapter card; requesting that data be moved between the host system memory and adapter card processing circuitry; determining that data is to be moved from the adapter card processing circuitry to host system memory; transferring a DMA packet to the data cache memory from the adapter card processing circuitry; notifying the host computer system that the DMA packet has been transferred; and transferring the DMA packet from the data cache memory to the host system memory.
Claim 18
Dependent Claim
127 words
A computer implemented method for providing virtual direct memory access (DMA) data transfers between an adapter card and a host computer system having a bus with no DMA capability, the method comprising the steps of: opening a common memory window between host system memory and a data cache memory on the adapter card; requesting that data be moved between the host system memory and adapter card processing circuitry; determining that data is to be moved from the adapter card processing circuitry to host system memory; transferring a DMA packet to the data cache memory from the adapter card processing circuitry; notifying the host computer system that the DMA packet has been transferred; and transferring the DMA packet from the data cache memory to the host system memory.
Claim 19
Dependent Claim
113 words
A computer implemented method for providing virtual direct memory access (DMA) data transfers between a host computer system having a bus with no DMA capability and an adapter card, the method comprising the steps of: opening a common memory window between host system memory and a data cache memory on the adapter card; requesting that data be moved between the host system memory and adapter card processing circuitry; determining that data is to be moved from host system memory to the adapter card processing circuitry; transferring a DMA packet from host system memory to the data cache memory on the adapter card; and loading the DMA packet into the adapter card processing circuitry.
Claim 20
Dependent Claim
113 words
A computer implemented method for providing virtual direct memory access (DMA) data transfers between a host computer system having a bus with no DMA capability and an adapter card, the method comprising the steps of: opening a common memory window between host system memory and a data cache memory on the adapter card; requesting that data be moved between the host system memory and adapter card processing circuitry; determining that data is to be moved from host system memory to the adapter card processing circuitry; transferring a DMA packet from host system memory to the data cache memory on the adapter card; and loading the DMA packet into the adapter card processing circuitry.
Claim 21
Dependent Claim
195 words
A computer program product comprising: a computer usable medium having a computer readable program embodied therein for causing virtual direct memory access (DMA) transfers on an adapter card attached to a computer bus without DMA support, the computer readable program in said computer program product further comprising: computer readable program code for causing a computer to effect the opening of a common memory window between host system memory and a data cache memory on the adapter card; computer readable program code for causing a computer to effect the requesting that data be moved between the host system memory and adapter card processing circuitry; computer readable program code for causing a computer to effect the determining of a direction of data movement; computer readable program code for causing a computer to effect the transferring of a DMA packet between the data cache memory and the adapter card processing circuitry; computer readable program code for causing a computer to notify a host computer system that data is to be moved; and computer readable program code for causing a computer to effect the transferring of a DMA packet between the data cache memory and the host system memory.
Claim 22
Dependent Claim
195 words
A computer program product comprising: a computer usable medium having a computer readable program embodied therein for causing virtual direct memory access (DMA) transfers on an adapter card attached to a computer bus without DMA support, the computer readable program in said computer program product further comprising: computer readable program code for causing a computer to effect the opening of a common memory window between host system memory and a data cache memory on the adapter card; computer readable program code for causing a computer to effect the requesting that data be moved between the host system memory and adapter card processing circuitry; computer readable program code for causing a computer to effect the determining of a direction of data movement; computer readable program code for causing a computer to effect the transferring of a DMA packet between the data cache memory and the adapter card processing circuitry; computer readable program code for causing a computer to notify a host computer system that data is to be moved; and computer readable program code for causing a computer to effect the transferring of a DMA packet between the data cache memory and the host system memory.
References Cited (Backward Citations)
US4523297A
Cited
US4464733A
Cited
US4847750A
Cited
US5083259A
Cited
US5237609A
Cited
US5335329A
Cited
US5537607A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-09-15 | 2001-03-17 | 2001-09-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-09-15 | 2005-03-17 | 2005-09-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-09-15 | 2009-03-17 | 2009-09-16 | $7700.00 | Window Closed / Lapsed |