High-speed data processor and coding method

Claim 2

A high-speed data processor comprising: an input module for receiving an input data stream from an input port; an encoder coupled to the input module for encoding the input data stream; an output module for providing an encoded data stream from the encoder to an output port; wherein the encoder performs a combination of parallel and serial processing steps during encoding of the input data stream including (a) receiving as inputs first and second parameters having initial values and which are representative of properties of the input data stream, (b) determining a value for a reference parameter using a lookup table, (c) comparing the fraction of the initial value for the first parameter with the value for a reference parameter and, in parallel, computing first and second updated values for each of the first and second parameters, (d) if the fraction of the initial value for the parameter is less than the value for a reference parameter, selecting for output the first updated values for the first and second parameters, (e) if the fraction of the initial value for the parameter is not less than the value for a reference parameter, selecting for output the second updated values for the first and second parameters.

Claim 3

A high-speed data processor of claim 1 wherein combination of parallel and serial processing steps provides a reduced processing cycle time.

Claim 4

A high-speed data processor of claim 1 wherein the encoder performs arithmetic coding to encode the input data stream.

Claim 5

A high-speed data processor of claim 1 wherein the fraction of the initial value for the first parameter is one-half.

Claim 6

A high-speed data processor of claim 1 wherein the initial value for the first parameter represents the size of an interval.

Claim 7

A high-speed data processor of claim 5 wherein the initial value for the second parameter represents the base of the interval.

Claim 8

A high-speed data processor of claim 1 wherein the input module is an input formatter.

Claim 9

A high-speed data processor of claim 1 wherein the output module is an output formatter.

Claim 10

A high-speed data processor of claim 1 wherein the encoder further receives as an input a third parameter having a value which is representative of a coding property of the encoder, and wherein the value for a reference parameter is determined as a function of the third parameter using a lookup table.

Claim 11

A high-speed data processor comprising: an input formatter for receiving an input data stream from an input port; an encoder coupled to the input formatter for encoding the input data stream using arithmetic coding; an output formatter for providing an encoded data stream from the encoder to an output port; wherein the encoder performs a combination of parallel and serial processing steps during encoding of the data stream including (a) receiving as inputs first and second parameters having initial values and which are representative of properties of the data stream, and receiving as an input a third parameter having a value which is representative of a coding property of the encoder, (b) determining a value for a reference parameter as a function of the third parameter using a lookup table, (c) comparing one-half of the initial value for the first parameter with the value for a reference parameter and, in parallel, computing first and second updated values for each of the first and second parameters, (d) if one-half of the initial value for the first parameter is less than the value for a reference parameter, selecting for output the first updated values for the first and second parameters, (e) if one-half of the initial value for the first parameter is not less than the value for a reference parameter, selecting for output the second updated values for the first and second parameters.

Claim 12

A high-speed data processor comprising: an input formatter for receiving an input data stream from an input port; an encoder coupled to the input formatter for encoding the input data stream using arithmetic coding; an output formatter for providing an encoded data stream from the encoder to an output port; wherein the encoder performs a combination of parallel and serial processing steps during encoding of the data stream including (a) receiving as inputs first and second parameters having initial values and which are representative of properties of the data stream, and receiving as an input a third parameter having a value which is representative of a coding property of the encoder, (b) determining a value for a reference parameter as a function of the third parameter using a lookup table, (c) comparing one-half of the initial value for the first parameter with the value for a reference parameter and, in parallel, computing first and second updated values for each of the first and second parameters, (d) if one-half of the initial value for the first parameter is less than the value for a reference parameter, selecting for output the first updated values for the first and second parameters, (e) if one-half of the initial value for the first parameter is not less than the value for a reference parameter, selecting for output the second updated values for the first and second parameters.

Claim 13

A high-speed data processor of claim 10 wherein combination of parallel and serial processing steps provides a reduced processing cycle time.

Claim 14

A high-speed data processor of claim 10 wherein the initial value for the first parameter represents the size of an interval between zero and one.

Claim 15

A high-speed data processor of claim 12 wherein the initial value for the second parameter represents the base of the interval.