Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
73 words
A method of expanding the number of pixels used to display a video image, comprising the steps of: receiving pixels associated with an incoming digitized video image; replicating each pixel; low-pass filtering the replicated pixels in two dimensions using a square symmetrical filter to provide interpolated values; converting the interpolated values into analog form; and displaying the converted pixels at the same frame rate as that associated with the incoming digitized video image.
Claim 2
Independent Claim
73 words
A method of expanding the number of pixels used to display a video image, comprising the steps of: receiving pixels associated with an incoming digitized video image; replicating each pixel; low-pass filtering the replicated pixels in two dimensions using a square symmetrical filter to provide interpolated values; converting the interpolated values into analog form; and displaying the converted pixels at the same frame rate as that associated with the incoming digitized video image.
Claim 3
Dependent Claim
19 words
The method of claim 1, further including the step of high-pass filtering the low-pass-filtered pixels to enhance their sharpness.
Claim 4
Independent Claim
133 words
A system for multiplying the number of pixels associated with a digitized video image, comprising: a source of a digitized video image having alternating fields; two read/write memories in communication with a common output bus; write-mode circuitry operative to enable the memories so that each is written with data representative of an alternating field of the image; read-mode circuitry operative to output the data onto the common bus, the read-mode circuitry operating at a frequency higher than that at which the pixels were written to memory, thereby expanding the number of pixels along each row and between consecutive rows; low-pass filtering means operative to filter the expanded pixels symmetrically in two dimensions to produce interpolated values; and a digital-to-analog converter to convert the digitally filtered, interpolated values into analog form for subsequent display.
Claim 5
Independent Claim
133 words
A system for multiplying the number of pixels associated with a digitized video image, comprising: a source of a digitized video image having alternating fields; two read/write memories in communication with a common output bus; write-mode circuitry operative to enable the memories so that each is written with data representative of an alternating field of the image; read-mode circuitry operative to output the data onto the common bus, the read-mode circuitry operating at a frequency higher than that at which the pixels were written to memory, thereby expanding the number of pixels along each row and between consecutive rows; low-pass filtering means operative to filter the expanded pixels symmetrically in two dimensions to produce interpolated values; and a digital-to-analog converter to convert the digitally filtered, interpolated values into analog form for subsequent display.
Claim 6
Dependent Claim
15 words
The system of claim 3 wherein the digital filtering means includes a square-response-type low-pass filter.
Claim 7
Dependent Claim
14 words
The system of claim 3 wherein the digital filtering means includes two one-dimensional filters.
Claim 8
Dependent Claim
78 words
The system of claim 3 further including: a second pair of read/write memories in communication with a second common output bus, each memory having a capacity sufficient to store data representative of the expanded pixels associated with both fields of the image; and read-mode circuitry operative to address the second pair of read/write memories so that while one of the memories is being written, the other may be read out to the digital-to-analog converter over the second bus.
Claim 9
Dependent Claim
20 words
The system of claim 6 wherein the read/write memory being read out is done so on a progressive scan basis.
Claim 10
Dependent Claim
20 words
The system of claim 6 wherein the read/write memory being read out is done so on an interlaced scan basis.